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Superconductor Science and Technology

Effects of the film thickness of a ground plane in the SFQ circuits with a dc-power layer

Hiroyuki Akaike, Akira Fujimaki, Shuichi Nagasawa, Y Kitagawa, Mutsuo Hidaka

Published Oct 18, 2007• 6 citations
Publisher

Abstract

We have investigated the effect of a dc-power (DCP) layer on the performance of single flux quantum (SFQ) circuits by changing the film thickness of a ground plane (GP). The DCP layer was placed below the GP and was used as bias current feeds. Two measurements were conducted. One was direct detection of the magnetic flux above the GP by using SQUIDs. The results indicated that the GPs with film thicknesses of more than 400 nm were effective to completely suppress the flux under the condition that the return current was extracted from the ground plane. The other was evaluation of the operating margins of the 408 bit shift register circuits (SRs) with 8032 Josephson junctions and a total designed bias current of 1.05 A. The results showed that a 500 nm thick GP had an advantage over a 300 nm thick GP in the dependence of the upper margin on the bias current port of the SR.

DOI
10.1088/0953-2048/20/11/s08

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IEEE Transactions on Applied Superconductivity•May 2, 2019•11 citations
We have investigated the effect of a dc-power (DCP) layer on the performance of single flux quantum (SFQ) circuits by changing the film thickness of a ground plane (GP). The DCP layer was placed below the GP and was used as bias current feeds. Two measurements were conducted. One was direct detection of the magnetic flux above the GP by using SQUIDs. The results indicated that the GPs with film thicknesses of more than 400 nm were effective to completely suppress the flux under the condition that the return current was extracted from the ground plane. The other was evaluation of the operating margins of the 408 bit shift register circuits (SRs) with 8032 Josephson junctions and a total designed bias current of 1.05 A. The results showed that a 500 nm thick GP had an advantage over a 300 nm thick GP in the dependence of the upper margin on the bias current port of the SR.
Large-scale SFQ integrated circuits require a large amount of dc-bias current. The magnetic fields induced by the dc-bias currents and the return currents flowing in a ground plane have a great influence on the performance of SFQ circuits. As an approach to reduce the influence, the dc-power (DCP) layer placed under a ground plane is newly introduced in SRL advanced Nb process. We have experimentally evaluated the effects of the DCP layer using SQUIDs and large-scale Josephson transmission line (JTL) circuits with more than 10,000 junctions. The SQUIDs showed that there was small magnetic flux coupling between the DCP lines and themselves and that the coupled flux was enhanced by the return current. The coupled flux decreased with increasing line width of the DCP lines and with increasing distance from the centerlines of them. In the large-scale JTL tests, the cells with DCP patterns showed wider operating margins than the CONNECT OPEN cells with partial magnetic shielding of bias current lines. The test results also showed that a line shape along the periphery of a cell was more effective than a plane shape within a cell as a DCP layer pattern for bias current feeds.
We have evaluated the effects of a DC power (DCP) layer in a 10-Nb-layer device using SQUIDs and large-scale Josephson transmission lines (LS-JTLs). The 10-Nb-layer device has recently been developed for SFQ LSIs, with an active layer including Josephson junctions (JJs) at the top, two passive transmission line layers in the middle, and the DCP layer for bias current feeds at the bottom. The evaluation with SQUIDs revealed that the 10-Nb-layer device structure drastically reduced the magnetic flux induced by DC currents flowing through the DCP line, in comparison with the previous advanced process device structure. A major factor for this reduction was an increase in the number of ground layers between the DCP layer and the active layer. In the test of the LS-JTLs containing about 12000 JJs, we obtained the operating margins as wide as numerically simulated ones. We also observed no difference in the margins between a method for extracting ground return currents through ground layers and that through the dedicated layer. These results demonstrated that the 10-Nb-layer device structure is suitable for SFQ-LSIs.
In this study we have investigated the influence of an externally applied ground current on large-scale single-flux-quantum (SFQ) circuits. A Josephson transmission line containing 10 4 junctions with a total bias current of 1.8 A was examined for this purpose. The test results show that the ground current affects the circuit operation remarkably strongly. In the worst case, the ground current of about 10 mA for a 5 mm die chip disturbs the circuit operation. The results also show that DC/SFQ and SFQ/DC converters are very sensitive to the ground current. To eliminate the effect of the ground current, we have made SFQ circuits completely shielded from the external magnetic field by using upper and lower ground planes. It was found that the shielded SFQ circuits are much less sensitive to the ground current. These results show that the magnetic shielding structure is one solution for reducing the effects of the ground current and hence the external magnetic field.
Complex RSFQ circuits are typically dc-biased with one or more current bias trees, with current returning through a superconducting ground plane. As the bias currents become larger in more complex circuits, it is increasingly critical to pay attention to the distribution of these return currents, and the effects of the resulting magnetic fields on the performance of the RSFQ circuits. We have modeled the current and field distributions, and found that magnetic field and flux are indeed significant. This has been confirmed by direct measurement using a distribution of SQUIDs. Furthermore, we have measured the performance of several RSFQ circuits, and have found that currents in the ground plane can significantly affect performance margins. Approaches to circuit and system designs that can reduce these problems are discussed.
The supply of bias current is one of the key problems to be overcome for fully operational large-scale SFQ circuits. Large currents cause various undesirable effects that degrade circuit operation. The magnetic field induced by a large DC bias current affects the operation of several SFQ cells, even with a microstrip-line structure applied for the bias lines. In this paper, experimental results using SQUIDs show that bias-line shielding is the most effective way to reduce the effect of the DC bias current. The operating margins of SFQ cells were also found to be sensitive to the current in the ground plane. The location of a ground bonding should be close to the point of current injection if we wish to avoid undesirable diffusion of current through the ground plane. We confirmed the effectiveness of bias-line shielding and of the location of ground bonding with a circuit composed of about 500 junctions.
Superconducting single flux quantum (SFQ) circuits have been shown to offer huge advantages that are ideal for high performance computing applications. These circuits can operate at very high frequencies (tens of GHz) but consume very low power (from nanowatts to microwatts per gate). Energy-efficient SFQ (ERSFQ) circuits, evolved from traditional rapid SFQ (RSFQ) circuits, were invented with the goal of elimination of static power dissipation. When compared with RSFQ circuits, ERSFQ circuits require a new biasing network that includes biasing Josephson junction(s), biasing inductor(s), and feeding Josephson transmission line(s). Some general suggestions on how to design the network have been offered, but a detailed analysis and optimization scenario for the network is still to be provided. In this paper, we first optimize the previously reported DC-biased two-Josephson junction per bit RSFQ shift register circuit, which can be used to provide a more robust, energy-efficient, and high memory capacity storage unit. The simulated power dissipation of 16-bit RSFQ shift register is 0.45 μW per bit when operating at 21.7 GHz. We then convert the RSFQ-based shift register into an ERSFQ structure and investigate the effects of the ERSFQ bias network on the margins of the ERSFQ circuit. Finally, we propose a more comprehensive optimization method for the ERSFQ biasing network.