Design, simulation, and experimental investigations of a direct current to a single flux quantum converter loaded with a Josephson transmission line and driven by an external 70 GHz microwave oscillator are reported. The test circuit includes nine YBaCuO Josephson junctions aligned on the grain boundary of a 0°–32° asymmetric Y-ZrO2 bicrystal substrate. The performance of such converters is important for the development of the fast Josephson samplers required for testing of high-Tc rapid single flux quantum circuits in high-speed digital superconducting electronics.
Design, simulation, and experimental investigations of a direct current to a single flux quantum converter loaded with a Josephson transmission line and driven by an external 70 GHz microwave oscillator are reported. The test circuit includes nine YBaCuO Josephson junctions aligned on the grain boundary of a 0°–32° asymmetric Y-ZrO2 bicrystal substrate. The performance of such converters is important for the development of the fast Josephson samplers required for testing of high-Tc rapid single flux quantum circuits in high-speed digital superconducting electronics.
The application of high temperature superconductor (HTS) Josephson junctions in digital rapid single flux quantum circuits requires a careful study of the influence of thermal noise on the bit error rate (BER). We have determined experimentally, for the first time, the BER of a HTS rapid single flux quantum circuit. A comparator, formed by two Josephson junctions, was integrated in a Josephson transmission line ring oscillator, allowing us to perform high speed testing of the comparator at GHz frequencies. For fabrication, focused-electron-beam-irradiated junctions have been used because of their small parameter spread and excellent alignment possibilities. A BER of less than 10−11 was obtained at 39 K.
A 3 bit single flux quantum (SFQ) shift register based on high-Tc bicrystal Josephson junctions has been designed, fabricated, and experimentally tested. The circuit consists of 26 bicrystal Josephson junctions and includes the shift register itself, two dc-SFQ converters, one readout superconducting quantum interference device, serving as a SFQ-dc converter, and three Josephson transmission lines. The correct operation of all circuit components has been demonstrated by low frequency testing at a temperature of 50 K.
A rapid single-flux quantum (RSFQ) set-reset trigger circuit has been implemented using YBaCuO grain boundary junctions on an asymmetric 32 degrees Y-ZrO 2 bicrystal. The circuit contains 18 Josephson junctions aligned along the grain boundary and required six film layers: a YBaCuO base electrode, two amorphous SrTiO 3 insulating layers, a superconducting Pb/Au/Cr ground plane and Au/Cr wiring. It consists of two DC-to-SFQ converters, two Josephson transmission lines and an SFQ-to-DC converter. Two pulse trains, 'signal' and 'clock', were applied to change the state of the trigger from '0' to '1' and vice versa, and registered at the SFQ-to-DC: output. All experiments were performed at 4.2 K.
A digital-to-analogue converter based on series arrays of high-temperature superconducting Josephson junctions can work properly when the microwave bias current distribution in large arrays is uniform. Unfortunately, the considerable microwave attenuation per overdamped junction with normal resistances RN0.1 results in a strong total attenuation of the microwave signal in a traditional layout. Also, the meander geometry of the array, necessary when using bicrystal junctions, disturbs the uniformity of the rf current, especially in the millimetre waveband. To overcome these drawbacks we coupled the meander array inductively to a parallel transmission line. The mechanism of microwave coupling in which both external and mutual frequency locking takes place was studied numerically. A circuit with a coplanar waveguide feed line was fabricated and successfully tested at an operating frequency of 30 GHz. A microstrip line with a small attenuation for pumping of junction arrays at frequencies up to 120 GHz was demonstrated.
AbstractSuperconducting digital technology based on Rapid Single Flux Quantum (RSFQ) logic offers a 50 times faster clock rate and 100 times less on chip power consumption than today's mainstream semiconductor electronics. This technology is attractive for many applications and in particular for Digital Signal Processing (DSP). The applications of the RSFQ DSPs are numerous and include multi-user detection in spread spectrum system, channel equalization for Multi-in, Multi-out (MIMO) systems, and blind detection and signal tracking for signal intelligence.At Chalmers we are developing a hybrid DSP with target performance of 30 giga operations per second. It consists of an RSFQ Multiply Accumulate unit (MAC), RSFQ fast cache memory, and an external semiconductor memory. The development of the complex high speed cryogenic digital system requires interface, packaging and testing solutions. The main difficulties are due to the 4 K operational temperature, the high magnetic field sensitivity of the RSFQ circuits, the multi-channel high bandwidth interface required in the hybrid architecture, and the high speed RSFQ digital core. The key steps towards addressing each of these problems are the subject of this thesis. The main emphasis is put on the experimental testing and interfacing of superconductor electronics. A large part of the work is connected to the experimental verification of DSP components and their incremental improvement towards functionality. The RSFQ circuits tested were fabricated using the four-metal layer VLSI processes available from NGST(8 kA/cm^2 Josephson junction critical current) and HYPRES (both 1 kA/cm^2 and HYPRES 4.5 kA/cm^2. The main results of the work are demonstrations of the RSFQ cache memory with more than 2,000 Josephson junctions, 33.5 GHz operation of the digital clock controller, and 20.48 GHz operation of the autocorrelator. In addition, various experiments have been done for investigation of parasitic effects in RSFQ circuits such as flux trapping and influence of the high current bias lines.At the final stage of the work, a unique high bandwidth 4 K cryocooler based experimental setup has been developed. The system, developed in close cooperation with Hypres Inc. USA, has 40 high speed I/Os with bandwidth of 2 Gbps, 64 DC bias channels, 4 high frequency clock lines, and 4 auxiliary control lines. It supports exchangeable test units for 10 mm x 10 mm and 20 mm x 20 mm Multi Chip Module (MCM) carriers. The availability of such a system is critical to demonstration of the hybrid DSP prototype and future commercialization.
We have developed the fabrication process, the circuit design technology, and the cryopackaging technology for high-Tc single flux quantum (SFQ) devices with the aim of application to an analog-to-digital (A/D) converter circuit for future wireless communication and a sampler system for high-speed measurements. Reproducibility of fabricating rampedge Josephson junctions with IcRn products above 1mV at 40K and small Ic spreads on a superconducting groundplane was much improved by employing smooth multilayer structures and optimizing the junction fabrication process. The separated base-electrode layout (SBL) method that suppresses the Jc spread for interface-modified junctions in circuits was developed. This method enabled low-frequency logic operations of various elementary SFQ circuits with relatively wide bias current margins and operation of a toggle-flip-flop (T-FF) above 200GHz at 40K. Operation of a 1:2 demultiplexer, one of main elements of a hybrid-type Σ-Δ A/D converter circuit, was also demonstrated. We developed a sampler system in which a sampler circuit with a potential bandwidth over 100GHz was cooled by a compact stirling cooler, and waveform observation experiments confirmed the actual system bandwidth well over 50GHz.