The Booth effect

Massimiliano Sassoli de Bianchi

Ryosuke Nakamoto, 栄 桜庭, Takeshi Onomi +2 more

We have designed a 2-bit Booth encoder with Josephson Transmission Lines (JTLs) and Passive Transmission Lines (PTLs) by using cell-based techniques and tools. The Booth encoding method is one of the algorithms to obtain partial products. With this method, the number of partial products decreases down to the half compared to the AND array method. We have fabricated a test chip for a multiplier with a 2-bit Booth encoder with JTLs and PTLs. It has a processing frequency of 20 GHz with the bias margin ±25%. The frequency of this circuit increases up to 45 GHz with the bias voltage by 25% increased from the design voltage. The circuit area of the multiplier designed with the Booth encoder method is compared to that designed with the AND array method.

Leslie Eastman

J. J. Álvarez-Sánchez, J.V. Alvarez-Bravo, Luis Miguel Morales Nieto

A new quantum architecture for multiplying signed integers is presented based on Booth's algorithm, which is well known in classical computation. It is shown how a quantum binary chain might be encoded by its flank changes, giving the final product in 2's-complement representation.

Kaveri Talawar, Poonam Hosamani

Reversible logic plays a vital role in Quantum computing and Nanotechnology which in future can be applied for low power processor applications. In this paper, we propose, ultra area efficient reversible quantum multiplier based on Radix-2 Booth's recoding algorithm. The Non-Fault tolerant Radix-2 Booth's recoding architecture is designed and optimized for Quantum Cost and Garbage Outputs. The proposed methodology for reversible quantum multiplier shows the improvement in terms of Quantum Cost, Garbage Outputs and gates count compared to all the existing reversible quantum multiplier designs.

Galina A. Nemova