Challenges
Datasets
Workspaces
Papers
Discussions
Leaderboard
Log inSign up
Challenges
Datasets
Workspaces
Papers
Discussions
Leaderboard
Blog
Job Board
Q3AS

© 2026 Aqora Quantum S.A.S.

TermsPrivacyLegal Notice

Applied Physics Letters

On-chip clock technology for ultrafast digital superconducting electronics

Deepnarayan Gupta, Yongming Zhang

Published Jun 19, 2000• 15 citations
Publisher

Abstract

An on-chip, low-jitter clock technology is essential for future multi-GHz digital electronics. In this article, we describe an on-chip clock technology for superconducting rapid single flux quantum (RSFQ) circuits built around an unshunted long Josephson junction (LJJ) oscillator that acts as a master clock source. The clock technology also includes clock frequency divider and selector circuits as well as a clock distribution network. These LJJ oscillators, implemented in linear and annular geometries using 3 μm Nb technology, have quality factors of 106. This clock technology potentially has widespread use in 10–100 GHz superconducting digital circuits and systems, including analog-to-digital converters, time-to-digital converters, correlators, and processors for ultrahigh performance computers.

DOI
10.1063/1.126792

Related papers

Two-phase 50 GHz on-chip long Josephson junction clock source

I. V. Vernik, Deepnarayan Gupta

On-chip, high-frequency clock sources are essential for the future development of superconductor digital circuits and systems. We have developed clock sources for rapid single flux quantum (RSFQ) digital circuits using high-quality long Josephson junction (LJJ) resonant oscillators that offer extremely low jitter. To meet the requirement for time-interleaved clock signals of complementary phase, two-phase 30 and 50 GHz clock sources using LJJ's have been developed with both linear and annular geometry. Unperturbed by reflections from boundaries and collisions among the fluxons (flux quanta), the annular LJJ oscillator has demonstrated superior stability and higher quality factor (>10/sup 6/) than the linear LJJ oscillator. The LJJ oscillator with linear geometry is easier to interface with RSFQ circuitry since it has well-defined boundaries at either end, facilitating a two-phase clock source. On the other hand, multiple clock phases may be derived from an annular LJJ oscillator by connecting interface circuitry at various points around the circular junction, if the interface circuitry does not interfere with the fluxon(s) in the annular junction. Experimental results for two-phase RSFQ clock sources based on linear and annular LJJ oscillators are presented.

IEEE Transactions on Applied Superconductivity•Jun 1, 2003•11 citations

High Quality On-Chip Long Annular Josephson Junction Clock Source for Digital Superconducting Electronics

Dmitri E. Kirichenko, I. V. Vernik

We have developed clock sources for rapid single flux quantum (RSFQ) digital circuits using high-quality long Josephson junction (LJJ) resonant oscillators of annular geometry. Being a topologically closed system and unperturbed by reflections from boundaries and collisions among the fluxons (flux quanta), the annular LJJ oscillator has demonstrated a high quality factor. The novel design of an annular junction clock that allows easier interface with RSFQ circuitry has been realized. Magnetic fluxons are inserted into an annular LJJ by local injection of current into the control line of the junction. This technique resolves the long-standing problem of achieving superior stability of the fluxon state for application as a clock source. The linewidth of the phase-locked clock source is measured as low as 24 Hz relative to a reference oscillator at 40 GHz. The cycle-to-cycle jitter was measured to be 9 fs at a frequency of 36 GHz, or 0.04% of the clock period which is in good agreement with theoretical estimation.

IEEE Transactions on Applied Superconductivity•Jun 1, 2005•14 citations

Generation and Distribution of Josephson Junction Clock

Simon J. Buehler, Dmitri E. Kirichenko, Deepnarayan Gupta

One of the crucial factors in achieving high performance of superconducting integrated circuits, such as analog-to-digital converters (ADCs), is sampling using a high-frequency clock source with a low cycle-to-cycle jitter. As the superconductor ADC technology matures toward more complex designs for higher dynamic range performance, the need for synchronous clocking of multiple comparators continues to grow. Since high-frequency external clock sources are expensive and make a significant contribution to the heat load of the system, a high-frequency and low-jitter on-chip clock source using long Josephson junction (LJJ) is considered the preferred long-term solution. Toward that end, we are working on improving an on-chip 110-GHz clock source based on an unshunted LJJ in annular geometry. Minimizing the additional jitter added by each fan-out of the clock signal is the effort's goal. For synchronous clocking of up to three comparators, we compare clock distribution using superconducting passive transmission lines and a new approach using novel active transmission lines. We also introduce a method of synchronizing LJJ clock source with an external stable oscillator by injection locking.

IEEE Transactions on Applied Superconductivity•Mar 1, 2016•0 citations

Low-jitter on-chip clock for RSFQ circuit applications

Yongming Zhang, Deepnarayan Gupta

The ultra-narrow linewidth of a long Josephson junction (LJJ) oscillator offers low timing jitter as a clock source. In this paper, we will discuss the improvement of an LJJ clock by using an annular geometry. We demonstrate the integration of an annular LJJ with a clock decimator which consists of a serial chain of toggle-flip-flops (TFFs). Each TFF divides its input frequency by a factor of 2. We have also developed a clock frequency selector. The clock selector circuit can choose either the master clock f m or one of its sub-harmonics ( f m /2 m , m = 1 to n ), based on the select inputs. The generation of a set of clocks will enable us to integrate the on-chip LJJ clock with a flash analogue-to-digital converter.

Superconductor Science and Technology•Nov 1, 1999•13 citations

Asynchronous circuits and systems in superconducting RSFQ digital technology

Z.J. Deng, Nobuyuki Yoshikawa, J. Tierno +2 more

Superconductive Rapid Single Flux Quantum (RSFQ) logic and memory, in which ones and zeros are represented by the presence or absence within a timing window of quantized picosecond voltage pulse (/spl int/v(t)dt=h/2e=2.07 mV/spl middot/ps), corresponding to one SFQ, can be integrated into a digital computing system with an operating rate of several tens of GHz, based on the present Nb Josephson junction integrated circuit technology. It is the most promising technology beyond semiconductor transistors for low-power high-end computation. However, as the operating speed of circuits and systems increase, timing uncertainty from fabrication process variations makes global synchronization very hard. In this paper, we present a globally asynchronous, locally synchronous timing methodology for RSFQ digital design, which can solve the global synchronization problem. We also demonstrate the recent experimental results of some asynchronous circuits and systems implemented in RSFQ technology. Several key components such as a self-timed shift register, a self-timed demultiplexor, a Muller-C element, a completion detector, and a clock generator have been designed and tested. High speed operation has been confirmed up to 20 Gb/s for a prototype data buffer system, which consists two self-timed shift registers and an on-chip 5-38 GHz clock generator.

IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC)•Nov 27, 2002•7 citations

Ultrafast Superconducting Digital Circuits for Analysis and Processing of Microwave Signals

Pascal Febvre, Torsten Reich, Thomas Ortlepp +1 more

Rapid-Single-Flux-Quantum (RSFQ) digital circuits based on shunted Josephson junctions have been shown to be able to digitally process signals up to several hundreds GHz. The principle of operation is based on the generation, transport and processing of picosecond voltage pulses of 2.07 mV.ps quantized area, which corresponds to one quantum flux h/2e. Operation of RSFQ circuits can be performed with clock frequencies of the order of 20 to 50 GHz with present technology. We will present current developments and experimental results obtained so far, based on circuits developed in the JeSEF RSFQ process of IPHT Jena, using a 1 kA/cm2 shunted Nb/Al-AlOx/Nb junctions. Some particular potential applications for space will be emphasized

•May 1, 2006•0 citations
An on-chip, low-jitter clock technology is essential for future multi-GHz digital electronics. In this article, we describe an on-chip clock technology for superconducting rapid single flux quantum (RSFQ) circuits built around an unshunted long Josephson junction (LJJ) oscillator that acts as a master clock source. The clock technology also includes clock frequency divider and selector circuits as well as a clock distribution network. These LJJ oscillators, implemented in linear and annular geometries using 3 μm Nb technology, have quality factors of 106. This clock technology potentially has widespread use in 10–100 GHz superconducting digital circuits and systems, including analog-to-digital converters, time-to-digital converters, correlators, and processors for ultrahigh performance computers.
On-chip, high-frequency clock sources are essential for the future development of superconductor digital circuits and systems. We have developed clock sources for rapid single flux quantum (RSFQ) digital circuits using high-quality long Josephson junction (LJJ) resonant oscillators that offer extremely low jitter. To meet the requirement for time-interleaved clock signals of complementary phase, two-phase 30 and 50 GHz clock sources using LJJ's have been developed with both linear and annular geometry. Unperturbed by reflections from boundaries and collisions among the fluxons (flux quanta), the annular LJJ oscillator has demonstrated superior stability and higher quality factor (>10/sup 6/) than the linear LJJ oscillator. The LJJ oscillator with linear geometry is easier to interface with RSFQ circuitry since it has well-defined boundaries at either end, facilitating a two-phase clock source. On the other hand, multiple clock phases may be derived from an annular LJJ oscillator by connecting interface circuitry at various points around the circular junction, if the interface circuitry does not interfere with the fluxon(s) in the annular junction. Experimental results for two-phase RSFQ clock sources based on linear and annular LJJ oscillators are presented.
We have developed clock sources for rapid single flux quantum (RSFQ) digital circuits using high-quality long Josephson junction (LJJ) resonant oscillators of annular geometry. Being a topologically closed system and unperturbed by reflections from boundaries and collisions among the fluxons (flux quanta), the annular LJJ oscillator has demonstrated a high quality factor. The novel design of an annular junction clock that allows easier interface with RSFQ circuitry has been realized. Magnetic fluxons are inserted into an annular LJJ by local injection of current into the control line of the junction. This technique resolves the long-standing problem of achieving superior stability of the fluxon state for application as a clock source. The linewidth of the phase-locked clock source is measured as low as 24 Hz relative to a reference oscillator at 40 GHz. The cycle-to-cycle jitter was measured to be 9 fs at a frequency of 36 GHz, or 0.04% of the clock period which is in good agreement with theoretical estimation.
One of the crucial factors in achieving high performance of superconducting integrated circuits, such as analog-to-digital converters (ADCs), is sampling using a high-frequency clock source with a low cycle-to-cycle jitter. As the superconductor ADC technology matures toward more complex designs for higher dynamic range performance, the need for synchronous clocking of multiple comparators continues to grow. Since high-frequency external clock sources are expensive and make a significant contribution to the heat load of the system, a high-frequency and low-jitter on-chip clock source using long Josephson junction (LJJ) is considered the preferred long-term solution. Toward that end, we are working on improving an on-chip 110-GHz clock source based on an unshunted LJJ in annular geometry. Minimizing the additional jitter added by each fan-out of the clock signal is the effort's goal. For synchronous clocking of up to three comparators, we compare clock distribution using superconducting passive transmission lines and a new approach using novel active transmission lines. We also introduce a method of synchronizing LJJ clock source with an external stable oscillator by injection locking.
The ultra-narrow linewidth of a long Josephson junction (LJJ) oscillator offers low timing jitter as a clock source. In this paper, we will discuss the improvement of an LJJ clock by using an annular geometry. We demonstrate the integration of an annular LJJ with a clock decimator which consists of a serial chain of toggle-flip-flops (TFFs). Each TFF divides its input frequency by a factor of 2. We have also developed a clock frequency selector. The clock selector circuit can choose either the master clock f m or one of its sub-harmonics ( f m /2 m , m = 1 to n ), based on the select inputs. The generation of a set of clocks will enable us to integrate the on-chip LJJ clock with a flash analogue-to-digital converter.
Superconductive Rapid Single Flux Quantum (RSFQ) logic and memory, in which ones and zeros are represented by the presence or absence within a timing window of quantized picosecond voltage pulse (/spl int/v(t)dt=h/2e=2.07 mV/spl middot/ps), corresponding to one SFQ, can be integrated into a digital computing system with an operating rate of several tens of GHz, based on the present Nb Josephson junction integrated circuit technology. It is the most promising technology beyond semiconductor transistors for low-power high-end computation. However, as the operating speed of circuits and systems increase, timing uncertainty from fabrication process variations makes global synchronization very hard. In this paper, we present a globally asynchronous, locally synchronous timing methodology for RSFQ digital design, which can solve the global synchronization problem. We also demonstrate the recent experimental results of some asynchronous circuits and systems implemented in RSFQ technology. Several key components such as a self-timed shift register, a self-timed demultiplexor, a Muller-C element, a completion detector, and a clock generator have been designed and tested. High speed operation has been confirmed up to 20 Gb/s for a prototype data buffer system, which consists two self-timed shift registers and an on-chip 5-38 GHz clock generator.
Rapid-Single-Flux-Quantum (RSFQ) digital circuits based on shunted Josephson junctions have been shown to be able to digitally process signals up to several hundreds GHz. The principle of operation is based on the generation, transport and processing of picosecond voltage pulses of 2.07 mV.ps quantized area, which corresponds to one quantum flux h/2e. Operation of RSFQ circuits can be performed with clock frequencies of the order of 20 to 50 GHz with present technology. We will present current developments and experimental results obtained so far, based on circuits developed in the JeSEF RSFQ process of IPHT Jena, using a 1 kA/cm2 shunted Nb/Al-AlOx/Nb junctions. Some particular potential applications for space will be emphasized