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Lecture notes in electrical engineering

One Hybrid-Parallel Weighted Bit-Flipping Algorithm for Low-Density Parity-Check Codes

Zhongxun Wang, Fangqiang Zhu

Published Jan 1, 2012• 0 citations
Publisher
DOI
10.1007/978-3-642-31516-9_43

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Because of the speed limitation of the conventional bit-selection strategy in the existing weighted bit flipping algorithms, a high-speed Low-Density Parity-Check (LDPC) decoder cannot be realised. To solve this problem, we propose a fast weighted bit flipping algorithm. Specifically, based on the identically distributed error bits, a parallel bit-selection method is proposed to reduce the selection delay of the flipped bits. The delay analysis demonstrates that, the decoding speed of LDPC codes can be significantly improved by the proposed algorithm. Furthermore, simulation results verify the validity of the proposed algorithm.