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LDPC decoding schemes with post-processing for lowering error floors

박호성

Published Jan 1, 2009• 1 citation
OpenAlex

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In this letter, we propose a multi-stage decoding scheme with post-processing for low-density parity-check (LDPC) codes, which remedies the rapid performance degradation in the high signal-to-noise ratio (SNR) range known as error floor. In the proposed scheme, the unsuccessfully decoded words of the previous decoding stage are re-decoded by manipulating the received log-likelihood ratios (LLRs) of the properly selected variable nodes. Two effective criteria for selecting the probably erroneous variable nodes are also presented. Numerical results show that the proposed scheme can correct most of the unsuccessfully decoded words of the first stage having oscillatory behavior, which are regarded as a main cause of the error floor.

IEICE Transactions on Communications•Jan 1, 2011•6 citations
Low-Density Parity-Check (LDPC) codes have extensive applications in numerous communication systems. However, iterative LDPC decoders may suffer from error floor. In this paper, a low complexity post processing scheme (PPS) is proposed to significantly improve the error correction performance of a Min-Sum based LDPC decoder in the error floor region. Instead of using trapping set elimination algorithms, the proposed PPS introduces perturbations so that a decoder can escape from undesired local maximums. After decoding failure, for these unreliable code bits, the proposed PPS generates carefully modified soft messages, which are employed in the following decoding iterations. Numerical results demonstrate that the presented PPS significantly lowers the error floor for simulated LDPC codes.
Low-density parity-check (LDPC) codes are widely used in a variety of communication systems because of their low complexity iterative decoding and performance approaching Shannon capacity. However, the existence of error floor seriously hinders the application and development of LDPC codes in related fields. In this paper, a deep learning-aided post-processing scheme (DLAPPS) based on Layered Normalized Min-Sum algorithm (LNMSA) is proposed to effectively lower error floor of LDPC codes. LNMSA is used in the first stage, and in the second stage incorrect frames are re-decoded by processing two types of nodes classified by neural networks. Simulation results show that the proposed DLAPPS can significantly improve error correction performance and lower the error floor of LDPC codes while maintaining a relatively low decoding complexity.
In this letter, we propose a multi-stage decoding scheme with post-processing for low-density parity-check (LDPC) codes, which remedies the rapid performance degradation in the high signal-to-noise ratio (SNR) range known as error floor. In the proposed scheme, the unsuccessfully decoded words of the previous decoding stage are re-decoded by manipulating the received log-likelihood ratios (LLRs) of the properly selected variable nodes. Two effective criteria for selecting the probably erroneous variable nodes are also presented. Numerical results show that the proposed scheme can correct most of the unsuccessfully decoded words of the first stage having oscillatory behavior, which are regarded as a main cause of the error floor.