The performance of superconducting quantum circuits is primarily limited by dielectric loss due to interactions with two-level systems (TLSs). State-of-the-art circuits with engineered material interfaces are approaching a limit where dielectric loss from bulk substrates plays an important role. However, a microscopic understanding of dielectric loss in crystalline substrates is still lacking. In this work, we show that boron acceptors in silicon constitute a TLS bath that leads to an energy dissipation channel for superconducting circuits. We discuss how the electronic structure of boron acceptors leads to an effective TLS response in silicon. We sweep the boron concentration in silicon and demonstrate the bulk dielectric loss limit from boron acceptors. We show that boron-induced dielectric loss can be reduced in a magnetic field due to the spin-orbit structure of boron. This work provides the first detailed microscopic description of a TLS bath for superconducting circuits and demonstrates the need for ultrahigh-purity substrates for next-generation superconducting quantum processors. Published by the American Physical Society 2024
Low-loss deposited dielectrics will benefit superconducting devices such as integrated superconducting spectrometers, superconducting qubits, and kinetic inductance parametric amplifiers. Compared with planar structures, multilayer structures such as microstrips are more compact and eliminate radiation loss at high frequencies. Multilayer structures are most easily fabricated with deposited dielectrics, which typically exhibit higher dielectric loss than crystalline dielectrics. We measure the subkelvin and low-power microwave and millimeter-submillimeter-wave dielectric loss of hydrogenated amorphous silicon carbide (
a-SiC:H), using superconducting chips with Nb-Ti-
N/a-SiC:H/Nb-Ti-N microstrip resonators. We deposit the
a-SiC:H by plasma-enhanced chemical vapor deposition at a substrate temperature of $400{\phantom{\rule{0.1em}{0ex}}}^{\ensuremath{\circ}}\mathrm{C}$. The
a-SiC:H has a millimeter-submillimeter loss tangent ranging from $0.9\ifmmode\times\else\texttimes\fi{}{10}^{\ensuremath{-}4}$ at 270 GHz to $1.5\ifmmode\times\else\texttimes\fi{}{10}^{\ensuremath{-}4}$ at 385 GHz. The microwave loss tangent is $3.1\ifmmode\times\else\texttimes\fi{}{10}^{\ensuremath{-}5}$. These are the lowest low-power subkelvin loss tangents that have been reported for microstrip resonators at millimeter-submillimeter and microwave frequencies. The
a-SiC:H films are free of blisters and have low stress: $\ensuremath{-}20$ MPa compressive at 200-nm thickness to 60 MPa tensile at 1000-nm thickness.
At sub-Kelvin temperatures, two-level systems (TLSs) present in amorphous dielectrics source a permittivity noise, degrading the performance of a wide range of devices using superconductive resonators such as qubits or kinetic inductance detectors. We report here on measurements of TLS noise in hydrogenated amorphous silicon (a-Si:H) films deposited by plasma-enhanced chemical vapor deposition in superconductive lumped element resonators using parallel-plate capacitors. The TLS noise results presented in this article for two recipes of a-Si:H improve on the best results achieved in the literature by a factor >5 for a-Si:H and other amorphous dielectrics and are comparable to those observed for resonators deposited on crystalline dielectrics.