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An overview of some efficient encoding and decoding algorithms for Low-Density Parity-Check Codes

Enrico Paolini, Gianluigi Liva, Marco Chiani

Published Oct 10, 2003• 0 citations
OpenAlex

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Low-density parity-check (LDPC) codes are linear error correcting codes which are capable of performing near channel capacity. Furthermore, they admit efficient decoding algorithms that provide near optimum performance. Their main disadvantage is that most LDPC codes have relatively complex encoders. In this thesis, we begin by giving a detailed discussion of the sum-product decoding algorithm, we then study the performance of LDPC codes on the binary erasure channel under sum-product decoding to obtain criteria for the design of codes that allow reliable transmission at rates arbitrarily close to channel capacity. Using these criteria we show how such codes are designed. We then present experimental results and compare them with theoretical predictions. Finally, we provide an overview of several approaches to solving the complex encoder problem.

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In this paper, an efficient encoding scheme for spatially coupled low-density parity-check (SC-LDPC) codes is proposed. In order to lower the error floor, we optimize the degree distribution of SC-LDPC codes and propose a split variable nodes algorithm constructing sub-matrices with large girth of SC-LDPC codes. The corresponding sliding window decoding is studied as well to fasten the decoding convergence. Simulation results show that on the AWGN channel, SC-LDPC codes can obtain better error performance, lower decoding complexity and faster decoding convergence as compared with the LDPC block codes (LDPC-BC).

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Jyothi Chinna Babu, C. Chinnapu Reddy, M. N. Giri Prasad

Lecture notes in electrical engineering•Dec 11, 2017•4 citations
Low-density parity-check (LDPC) codes are linear error correcting codes which are capable of performing near channel capacity. Furthermore, they admit efficient decoding algorithms that provide near optimum performance. Their main disadvantage is that most LDPC codes have relatively complex encoders. In this thesis, we begin by giving a detailed discussion of the sum-product decoding algorithm, we then study the performance of LDPC codes on the binary erasure channel under sum-product decoding to obtain criteria for the design of codes that allow reliable transmission at rates arbitrarily close to channel capacity. Using these criteria we show how such codes are designed. We then present experimental results and compare them with theoretical predictions. Finally, we provide an overview of several approaches to solving the complex encoder problem.
To reduce the complexity of encoder-decoder,the construction of QuasiCyclic Low-Density Parity-Check(QC-LDPC) codes was studied.A simplified method to find the systematic generator matrix from its parity check matrix was introduced which could greatly reduce the encoding complexity and realize linear encode-able codes.A modified Turbo serial message passing schedule for min-sum algorithm was applied with approximately the same performance as the sum-product algorithm,which updated messages immediately and converges fast.Based on the fixed point DSP,a high performance encoder-decoder were designed.The simulation result shows that this algorithm realizes efficient encoding and decoding with low complexity.
In this paper, an efficient encoding scheme for spatially coupled low-density parity-check (SC-LDPC) codes is proposed. In order to lower the error floor, we optimize the degree distribution of SC-LDPC codes and propose a split variable nodes algorithm constructing sub-matrices with large girth of SC-LDPC codes. The corresponding sliding window decoding is studied as well to fasten the decoding convergence. Simulation results show that on the AWGN channel, SC-LDPC codes can obtain better error performance, lower decoding complexity and faster decoding convergence as compared with the LDPC block codes (LDPC-BC).