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arXiv:2609.30496

Disentangling Expressibility, Symmetry Protection, and Hardware Noise in Variational Quantum Simulation of the Two-Flavor Schwinger Model

Karthikeya Machiraju, Krishna Sujith, Kaustav Bhowmick

quant-phhep-latSubmitted Sep 24, 2026• Announced Sep 28, 2026• 0 citations
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Abstract

Existing quantum simulations of the two-flavor Schwinger model have run at a single lattice size, and it is not known how far the variational approach can be pushed or which weakness stops it first. Following the model from N = 2 to 6 staggered lattice sites, we find that the binding constraint at reachable sizes is hardware noise rather than circuit expressibility or trainability, and identify N = 3 as the immediately viable extension of existing trapped-ion experiments. The energy error of a charge-conserving ansatz collapses onto one function of p/d, the ratio of variational parameters to physical-sector dimension, and falls by more than two orders of magnitude as p/d rises through order unity, giving the expressibility condition L(4N - 1) >= binom(2N,N) for L circuit layers. The condition is local in chemical potential: at N = 3 the layer count sufficient at zero chemical potential leaves a 74.38% error near the first-order boundary, while one further layer reaches 0.08%. Charge conservation also protects trainability and prevents charge-sector leakage: as the qubit count doubles from 4 to 8, the normalized gradient variance falls to 1/3.56 of its starting value for the constrained ansatz, versus 1/13.57 for an unconstrained circuit. Comparing a global contraction with per-gate local noise, a fixed-parameter control shows that the noise model, not whether the optimizer runs inside the noisy loop, sets how strongly noise degrades the first-order transition. At N = 4, a noiseless control reaches 0.12% mean error, whereas the same circuit at 1.00% depolarizing noise reaches 25.69 to 52.81%.

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Muhammad Kashif, Muhammad Shafique

Variational quantum algorithms (VQAs) rely on parameterized quantum circuits (PQCs), whose performance is governed by expressibility and trainability. Existing studies typically evaluate these properties at the logical circuit level, implicitly assuming that designed PQCs remain unchanged during hardware execution. In practice, however, hardware-aware transpilation modifies circuit structure through qubit mapping, routing, and basis decomposition, potentially altering PQC behavior. In this paper, we perform a systematic hardware-aware analysis of expressibility and trainability by comparing logical and transpiled PQCs across multiple ansatz families, qubit counts, and circuit depths. Expressibility is measured using fidelity-based KL divergence, while trainability is quantified through gradient variance. Our results show that transpilation acts as an implicit architectural perturbation, producing strongly ansatz-dependent effects. Expressibility deviations exceed upto 125% in some cases, while trainability variations reach up to 25%. Structured ansatzes are generally more robust, whereas highly entangled architectures are more sensitive to transpilation-induced transformations. We further show that transpilation can alter the commonly assumed expressibility-trainability trade-off, demonstrating that logical-level analyses may not reliably predict hardware-level behavior. These findings highlight the importance of hardware-aware evaluation for accurate characterization of VQAs.

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Existing quantum simulations of the two-flavor Schwinger model have run at a single lattice size, and it is not known how far the variational approach can be pushed or which weakness stops it first. Following the model from N = 2 to 6 staggered lattice sites, we find that the binding constraint at reachable sizes is hardware noise rather than circuit expressibility or trainability, and identify N = 3 as the immediately viable extension of existing trapped-ion experiments. The energy error of a charge-conserving ansatz collapses onto one function of p/d, the ratio of variational parameters to physical-sector dimension, and falls by more than two orders of magnitude as p/d rises through order unity, giving the expressibility condition L(4N - 1) >= binom(2N,N) for L circuit layers. The condition is local in chemical potential: at N = 3 the layer count sufficient at zero chemical potential leaves a 74.38% error near the first-order boundary, while one further layer reaches 0.08%. Charge conservation also protects trainability and prevents charge-sector leakage: as the qubit count doubles from 4 to 8, the normalized gradient variance falls to 1/3.56 of its starting value for the constrained ansatz, versus 1/13.57 for an unconstrained circuit. Comparing a global contraction with per-gate local noise, a fixed-parameter control shows that the noise model, not whether the optimizer runs inside the noisy loop, sets how strongly noise degrades the first-order transition. At N = 4, a noiseless control reaches 0.12% mean error, whereas the same circuit at 1.00% depolarizing noise reaches 25.69 to 52.81%.
Parameterized quantum circuits~(PQCs) constitute a central building block of variational quantum algorithms~(VQAs) and quantum machine learning~(QML) methods. Existing ansatz designs often adopt hardware-agnostic or simplified 1D chain/ring entanglement patterns. However, as quantum hardware continues to develop, native 2D connectivity patterns, such as planar superconducting-qubit architectures, are becoming increasingly important. Inspired by this hardware structure, we construct a native 2D pairwise ansatz and compare its expressibility and trainability with representative 1D ansatze at identical layer depths, despite their different circuit depths. For the fixed 16-qubit system, the 2D ansatz has the smallest KL divergence at L=1L=1L=1 and 222, and its second-order frame potential approaches the theoretical lower bound more rapidly at shallow layer counts than the frame potentials of the three 1D ansatze. We also evaluate the gradient variance of the Pauli-ZZZ-string expectation value ⟨Z0⊗⋯⊗Z15⟩\langle Z_0\otimes\cdots\otimes Z_{15}\rangle⟨Z0​⊗⋯⊗Z15​⟩ with respect to the first RyR_yRy​ angle. For this Pauli-ZZZ string and fixed parameter, the gradient variance is smaller for the 2D circuit at L=1L=1L=1--444. The differences narrow at L=5L=5L=5, and the four ansatze yield statistically compatible variances at L=6L=6L=6.
Simulations in high-energy physics are currently emerging as an application of noisy intermediate-scale quantum (NISQ) computers. In this work, we explore the multi-flavor lattice Schwinger model - a toy model inspired by quantum chromodynamics - in one spatial dimension and with nonzero chemical potential by means of variational quantum simulation on a shuttling-based trapped-ion quantum processor. This fermionic problem becomes intractable for classical numerical methods even for small system sizes due to the notorious sign problem. We employ a parametric quantum circuit executed on our quantum processor to identify ground states in different parameter regimes of the model, mapping out a quantum phase transition which is the hallmark feature of the model. The resulting states are analyzed via quantum state tomography, to reveal how characteristic properties such as correlations in the output state change across the phase transition. Moreover, we use the results to determine the phase boundaries of the model.
Variational quantum circuits (VQCs) solving partial differential equations (PDEs) on near-term quantum hardware face a critical challenge: hardware noise degrades solution fidelity and disrupts convergence. We present a systematic study of three noise channels; depolarizing, amplitude damping, and bit-flip on VQCs constrained by PDE residual loss functions for the heat equation, Burgers' equation, and the Saint-Venant shallow water equations. We benchmark three error mitigation strategies: zero-noise extrapolation (ZNE) via Richardson polynomial fitting, probabilistic error cancellation (PEC), and measurement error mitigation through inverse confusion matrices. Our numerical experiments on 6-qubit, 4-layer circuits demonstrate that ZNE reduces absolute error by 82-96% at low noise (p = 0.001), with effectiveness degrading gracefully at higher noise strengths. We prove analytically and confirm numerically that physics-constrained circuits exhibit inherent noise resilience: at p = 0.01, constrained circuits maintain 25-47% higher fidelity than unconstrained counterparts, with the advantage scaling with PDE complexity. PEC provides near-exact correction at low gate counts but incurs exponential sampling overhead, rendering it impractical beyond ~60 gates at p >= 0.02. Error budget decomposition reveals that systematic errors dominate at all noise levels (43-58%), while the PDE residual component grows from ~10% to ~31% as noise increases, indicating that physics constraints absorb noise through structured gradient information. These results establish practical guidelines for deploying variational PDE solvers on NISQ hardware.
Quantum error mitigation (QEM) is at the very heart of near-term quantum simulations and lattice gauge theories are no exceptions, rather their physical symmetries provide natural consistency checks on noise quantum states. In this work, we exploit the parity and fermion-number symmetries of a gauge theory, the (1+1)-dimensional Schwinger model, under depolarising noise and investigate symmetry verification under digital quantum simulation. We investigate two set-ups - symmetry- sector post-selection in adiabatic state preparation followed by real-time measurements of the chiral condensate and symmetry verification within a variational quantum eigensolver (VQE). In the first case, post-selection reduces the bias in the chiral condensate consistently removing up to 60% of the quantum noise induced error in our system. Motivated by the observed regularity of the residual bias (in the low-noise regime), we further introduce a global-noise calibration obtained from classically accessible smaller lattices and implemented on larger lattices recovering noiseless chiral condensate values within statistical uncertainty. However, in VQE, symmetry verification does not seem to generally improve the optimised parameters or the fidelity of the prepared states, although it reduces the bias in the estimated ground-state energy. This demonstates that improving a noisy cost-function estimator in variational algorithms does not necessarily improve the outcome of the algorithm. Our results show the strength of symmetry verification in different approaches while establishing that its usefulness critically depends on where it is applied in the computational workflow, and provide practical guidance for symmetry-assisted quantum error mitigation in quantum simulations of lattice gauge theories.
This study investigates classification performance and trainability of variational quantum classifiers on near-term noisy quantum hardware across circuit depth and qubit count regimes within the context of quantum computing and machine learning, an area of growing scientific importance given its implications for hybrid quantum-classical algorithm design and practical NISQ hardware benchmarking for near-term quantum advantage assessment. Using gradient-based parameter optimization of parameterized quantum circuits with hardware noise modeling via density matrix simulation and physical execution on IBM Eagle processors, we examine expressibility of parameterized circuits enabling nonlinear decision boundaries in feature Hilbert space, with trainability constrained by barren plateau gradients at large qubit counts in 96 circuit architectures (4 qubit counts x 4 depths x 6 ansatz families) evaluated across 5 classification datasets with 20 random initialization seeds each drawn from IBM Quantum Eagle (127-qubit) and Falcon (27-qubit) processors with noise mitigation via zero-noise extrapolation. Results indicate that 10-qubit, 4-layer VQC achieves 84.2% classification accuracy on the best benchmark, within 3.8 percentage points of classical SVM, but gradient variance decays exponentially with qubit count (variance halving per 2 added qubits), confirming barren plateau scaling (p < 0.001), with 84.2% accuracy, 3.8 pp gap to classical SVM baseline as the primary quantitative benchmark. Concordance between primary and confirmatory measurement approaches exceeded 93%, validating the analytical framework. These findings contribute empirically to quantum computing and machine learning and carry actionable implications for the design of programs and policies targeting hybrid quantum-classical algorithm design and practical NISQ hardware benchmarking for near-term quantum advantage assessment.
Variational quantum algorithms (VQAs) rely on parameterized quantum circuits (PQCs), whose performance is governed by expressibility and trainability. Existing studies typically evaluate these properties at the logical circuit level, implicitly assuming that designed PQCs remain unchanged during hardware execution. In practice, however, hardware-aware transpilation modifies circuit structure through qubit mapping, routing, and basis decomposition, potentially altering PQC behavior. In this paper, we perform a systematic hardware-aware analysis of expressibility and trainability by comparing logical and transpiled PQCs across multiple ansatz families, qubit counts, and circuit depths. Expressibility is measured using fidelity-based KL divergence, while trainability is quantified through gradient variance. Our results show that transpilation acts as an implicit architectural perturbation, producing strongly ansatz-dependent effects. Expressibility deviations exceed upto 125% in some cases, while trainability variations reach up to 25%. Structured ansatzes are generally more robust, whereas highly entangled architectures are more sensitive to transpilation-induced transformations. We further show that transpilation can alter the commonly assumed expressibility-trainability trade-off, demonstrating that logical-level analyses may not reliably predict hardware-level behavior. These findings highlight the importance of hardware-aware evaluation for accurate characterization of VQAs.