The interaction between a qubit and its environment can be engineered such that one error channel dominates over all others, resulting in noise bias. This property enables error correction codes to focus on the dominant error type, thereby significantly reducing the number of physical systems required for fault-tolerant quantum computation. However, engineering noise bias typically introduces complexity at the physical system level, which decreases its usefulness by limiting scalability. Here, we introduce and experimentally realize a noise-biased qubit in a standard transmon-readout resonator circuit, one of the most common superconducting architectures, by only adding a single microwave tone. We encode the qubit in the transmon $|\mathrm{g}\rangle$- and $|\mathrm{f}\rangle$-states, and engineer a frequency-selective gain channel that counteracts single-photon loss errors between the computational states. We demonstrate an order-of-magnitude enhancement in relaxation time compared to the $|\mathrm{g}\rangle-|\mathrm{e}\rangle$ encoding, conceding only a factor-of-two decrease in the echo-coherence time. Furthermore, we show that this qubit is compatible with fast, high-fidelity operations. Our results open a path towards using this system as a simple building-block for hardware-efficient quantum error detection and correction schemes.
The interaction between a qubit and its environment can be engineered such that one error channel dominates over all others, resulting in noise bias. This property enables error correction codes to focus on the dominant error type, thereby significantly reducing the number of physical systems required for fault-tolerant quantum computation. However, engineering noise bias typically introduces complexity at the physical system level, which decreases its usefulness by limiting scalability. Here, we introduce and experimentally realize a noise-biased qubit in a standard transmon-readout resonator circuit, one of the most common superconducting architectures, by only adding a single microwave tone. We encode the qubit in the transmon ∣g⟩- and ∣f⟩-states, and engineer a frequency-selective gain channel that counteracts single-photon loss errors between the computational states. We demonstrate an order-of-magnitude enhancement in relaxation time compared to the ∣g⟩−∣e⟩ encoding, conceding only a factor-of-two decrease in the echo-coherence time. Furthermore, we show that this qubit is compatible with fast, high-fidelity operations. Our results open a path towards using this system as a simple building-block for hardware-efficient quantum error detection and correction schemes.
Quantum error correction (QEC) is essential for practical quantum computation, but conventional approaches require large numbers of physical qubits per logical qubit, imposing severe hardware overhead. Noise-biased qubits, in which one error type dominates over the others, offer a route to reducing this overhead by enabling tailored QEC codes that exploit the error asymmetry. This work demonstrates, through two separate experiments, that combining Hamiltonian and dissipation engineering provides a versatile framework for enhancing the noise-bias of superconducting qubits. In the first experiment, we focus on the Kerr-cat qubit (KCQ), a noise-biased qubit encoded in the degenerate eigenstates of a two-photon driven Kerr oscillator, and study leakage outside the KCQ manifold, a key limitation of this system. We apply microwave pulses to selectively address the leakage states and to perform the first direct measurement of their population. We find a leakage population exceeding 9 %, consistent with substantial quantum heating and twelve times larger than the thermal excited-state population of the undriven oscillator. To reduce it, we introduce frequency-selective engineered single-photon dissipation. We show that this suppresses the leakage and extends the bit-flip time to 3.6 ms, while leaving the phase-flip time unchanged and reaching a qubit noise bias of 1400. In the second experiment, we introduce the gain-engineered transmon: a qubit encoded in the |g⟩ and |f⟩ levels of a standard transmon, in which a frequency-selective engineered single-photon-gain channel on the |e⟩ ↔ |f⟩ transition autonomously corrects single-photon loss errors. We demonstrate a factor-of-17 enhancement of the relaxation time, at the cost of only a 2.1 reduction in echo coherence time, while maintaining single-qubit gate errors below 0.5 %. Numerical simulations further show that the gain-engineered transmon can serve as a noisebiased ancilla for fault-tolerant error detection, suppressing both the ancilla detection infidelity and the error backaction below those of a standard |g⟩ ↔ |e⟩ ancilla qubit. These results establish the combination of Hamiltonian and dissipation engineering as a practical strategy for protecting quantum information. Because our architectures build on standard superconducting circuits, they integrate easily into existing platforms. We envision that steady improvements to noise-biased qubits, such as those developed in this thesis, could allow them to replace the transmon as the building block of superconducting quantum processors, lowering the hardware overhead of fault-tolerant quantum computation. Beyond quantum information processing, the driven nonlinear oscillators discussed in this thesis may serve as analog simulators of complex quantum dynamics, and as platforms for studying fundamental effects in driven-dissipative systems.
Quantum error correction using erasure qubits offers higher fault-tolerant thresholds and improved scaling by converting dominant physical errors into detectable erasures. In superconducting circuits, erasure qubits can be constructed using the dual-rail approach, which, however, requires additional qubit-count overhead and tailored coupling elements. Here, we demonstrate a hardware-efficient scheme that operates transmon qutrits as erasure qubits, which is compatible with standard superconducting circuit-QED hardware. The logical states ∣0L⟩ and ∣1L⟩ are represented by the ground and second excited states, while the dominant relaxation errors can be detected via an ancilla qubit using a microwave-activated two-qutrit SWAP gate. We demonstrate a logical qubit T1 lifetime exceeding 500μs, post-selected with repeated mid-circuit erasure detection, which is ten times longer than the T1 time of the transmon physical qubit. Coherence times beyond 300μs are achieved using dynamical decoupling. Single-qubit gate operations reach average Clifford gate infidelity on the order of 10−4. We further demonstrate dual-purposing an ancilla qubit for both erasure detection and parity checking, showing heralded generation of Bell states between erasure qubits. These results suggest that mainstream architectures of transmon qubit arrays may already be capable of implementing erasure-based QEC strategies for hardware-efficient fault-tolerant quantum computing.
Erasure qubits are beneficial for quantum error correction due to their relaxed threshold requirements. While dual-rail erasure qubits have been demonstrated with a strong error hierarchy in circuit quantum electrodynamics, biased-erasure qubits -- where erasures originate predominantly from one logical basis state -- offer further advantages. Here, we realize a hardware-efficient biased-erasure qubit encoded in the vacuum and two-photon Fock states of a single microwave cavity. The qubit exhibits an erasure bias ratio of over 265. By using a transmon ancilla for logical measurements and mid-circuit erasure detections, we achieve logical state assignment errors below 1% and convert over 99.3% leakage errors into detected erasures. After postselection against erasures, we achieve effective logical relaxation and dephasing rates of (6.2ms)−1 and (3.1ms)−1, respectively, which exceed the erasure error rate by factors of 31 and 15, establishing a strong error hierarchy within the logical subspace. These postselected error rates indicate a coherence gain of about 6.0 beyond the break-even point set by the best physical qubit encoded in the two lowest Fock states in the cavity. Moreover, randomized benchmarking with interleaved erasure detections reveals a residual logical gate error of 0.29%. This work establishes a compact and hardware-efficient platform for biased-erasure qubits, promising concatenations into outer-level stabilizer codes toward fault-tolerant quantum computation.
Large-scale quantum computers will inevitably need quantum error correction to protect information against decoherence. Traditional error correction typically requires many qubits, along with high-efficiency error syndrome measurement and real-time feedback. Autonomous quantum error correction (AQEC) instead uses steady-state bath engineering to perform the correction in a hardware-efficient manner. We realize an AQEC scheme, implemented with only two transmon qubits in a 2D scalable architecture, that actively corrects single-photon loss and passively suppresses low-frequency dephasing using six microwave drives. Compared to uncorrected encoding, factors of 2.0, 5.1, and 1.4 improvements are experimentally witnessed for the logical zero, one, and superposition states. Our results show the potential of implementing hardware-efficient AQEC to enhance the reliability of a transmon-based quantum information processor.
Qubits with strongly biased noise, in which phase-flip errors are orders of magnitude more frequent than bit-flips, arise both naturally, as in electron and nuclear spins, and by engineering, as in stabilized cat qubits. This noise structure holds the promise of reducing the daunting hardware overhead of fault-tolerant quantum computing, but exploiting it requires physical operations that do not convert frequent phase-flips into rare bit-flips. In this review, we analyze the most prominent fault-tolerant protocols for biased-noise qubits, organized according to the available set of such bias-preserving operations. When this set is restricted to the CZ gate together with preparation and measurement in the X basis, we show that the complexity of the required syndrome extraction gadgets essentially cancels the benefit of the noise bias: at experimentally relevant error rates, one may as well ignore the bias and rely on standard error correction designed for depolarizing noise. The situation changes drastically when a bias-preserving CX gate is available: the hierarchy of errors can then be reflected in the structure of the code, with frequent phase-flips corrected by a dedicated high-threshold code and rare bit-flips by concatenation with a high-rate code. The same hierarchy also enables hardware-efficient preparation of magic states. Finally, as a bias-preserving CX is forbidden in naturally biased platforms and challenging in engineered ones, we present a measurement-based architecture in which a high-fidelity quantum non-demolition readout of multi-qubit Pauli Z operators takes its place, extending these overhead reductions to a much broader range of physical platforms.
Quantum error correction imposes stringent requirements on the underlying hardware: all core operations of a quantum processor – single-qubit gates, two-qubit entangling gates, qubit readout, and qubit reset – must operate well below the error thresholds of leading codes. While such thresholds have already been crossed in several platforms, the associated overhead in physical qubits and circuit depth remains extremely sensitive to the physical error rate. This thesis investigates how far a superconducting platform based on transmon qubits can be pushed toward its physical limits, and how architectural and control choices can be optimized to reduce the overhead required for fault-tolerant quantum computation. First, we develop and characterize tunable-coupler architectures that enable fast, high-fidelity controlled-Z (CZ) gates. A long-distance coupler increases the qubit-qubit separation, freeing chip area for additional on-chip components, while still achieving CZ fidelities above 99.8%. Building on this, we optimize the qubit-coupler coupling to simultaneously support high-performance single- and two-qubit gates. We achieve simultaneous single- and two-qubit gate fidelities exceeding 99.9% on the same chip using a CZ calibration experiment based on our phase-averaged leakage error amplification (PALEA) protocol. PALEA coherently amplifies small over- and under-rotations of the diabatic CZ gate, making calibration errors easier to detect and correct. Second, we address single-qubit gates. Using spectrally engineered FAST-DRAG and higherderivative DRAG pulses, we demonstrate sub-8 ns gates with errors of order 10!" and strongly suppressed leakage. Third, we address readout by combining shelving to a higher qubit level with Purcell-filtered resonators and quantum-limited amplification, achieving readout errors below 10!#. Beyond the transmon workhorse, we explore the unimon qubit, which combines large anharmonicity with reduced charge sensitivity, and investigate a quantum circuit refrigerator as an integrated resource for fast, unconditional qubit reset via engineered dissipation. Finally, we demonstrate a cryogenic microwave link between two dilution refrigerators, enabling remote state transfer and entanglement over a five-meter distance and illustrating a path toward modular and distributed superconducting quantum processors. Together, these results show that with careful co-design of device layout, coupling topology, pulse shaping, and calibration protocols, all core operations – except qubit reset – of a superconducting quantum processor can be operated in the 10!#–10!" error regime within a coherent hardware and control stack, substantially lowering the resource overhead required for future fault-tolerant architectures.