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arXiv:2605.30768

Geometric dependence of critical-current variation in Al/AlO${\rm _x}$/Al Josephson junctions: a model-based analysis

K. Kakuyanagi, N. Teran, H. Toida, S. Saito

quant-phcond-mat.supr-conSubmitted May 29, 2026• Announced Jun 1, 2026• 0 citations
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Abstract

Achieving uniform critical current across Josephson junctions is essential for the large-scale integration of superconducting quantum circuits. In this work, we statistically analyzed the variation of the critical current of Al/AlO${\rm _x}$/Al junctions using room-temperature tunnel resistance statistics, and identified the dominant contribution among the modeled sources of the variation based on their dependence on geometry and deposition conditions of junctions. Our model-based analysis reveals that fluctuations in the Al film thickness play the dominant role among the modeled contributing factors. Based on this analysis, we found that, in Dolan-bridge double-angle deposition, adopting a deposition angle of 30-degree for bilayer junctions significantly improves uniformity, yielding a relative standard deviation of 1.2% (0.5%) across a 9.75 mm (1.5 mm) square region.

Comments
8 pages, 4 figures, including supplementary material

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Geometric dependence of critical-current variation in Al/AlOx{\rm _x}x​/Al Josephson junctions: a model-based analysis
Achieving uniform critical current across Josephson junctions is essential for the large-scale integration of superconducting quantum circuits. In this work, we statistically analyzed the variation of the critical current of Al/AlOx{\rm _x}x​/Al junctions using room-temperature tunnel resistance statistics, and identified the dominant contribution among the modeled sources of the variation based on their dependence on geometry and deposition conditions of junctions. Our model-based analysis reveals that fluctuations in the Al film thickness play the dominant role among the modeled contributing factors. Based on this analysis, we found that, in Dolan-bridge double-angle deposition, adopting a deposition angle of 30-degree for bilayer junctions significantly improves uniformity, yielding a relative standard deviation of 1.2% (0.5%) across a 9.75 mm (1.5 mm) square region.
Achieving uniform critical current across Josephson junctions is essential for the large-scale integration of superconducting quantum circuits. In this work, we statistically analyzed the variation of the critical current of Al/AlOx/Al junctions using room-temperature tunnel resistance statistics and identified the dominant contribution among the modeled sources of the variation based on their dependence on geometry and deposition conditions of junctions. Our model-based analysis reveals that fluctuations in the Al film thickness play the dominant role among the modeled contributing factors. Based on this analysis, we found that, in Dolan-bridge double-angle deposition, adopting a deposition angle of 30° for bilayer junctions significantly improves uniformity, yielding a relative standard deviation of 1.2% (0.5%) across a 9.75 mm (1.5 mm) square region.
Josephson junctions (JJs) are critical components in superconducting quantum circuits, where their electrical properties directly determine qubit transition frequencies. While advances in fabrication have enabled precise control over junction area and oxide thickness, the influence of junction geometry beyond area has remained largely unexplored. Here, we report clear and reproducible evidence that the normal-state resistance (Rn) of JJs depends strongly on geometric parameters, demonstrating that (Rn) exhibits a systematic and reproducible dependence on junction geometry beyond simple area scaling. To account for this behavior, we introduce an edge-resistance model that incorporates perimeter-related contributions to (Rn). Our findings highlight the crucial role of geometric design in JJ electrical characteristics and provide a practical framework for improving frequency precision and uniformity in large-scale superconducting quantum processors.
Abstract The uniformity of Josephson-junction (JJ) characteristics is crucial in wafer-scale superconducting quantum-bit (qubit) integration. To achieve the level of accuracy demanded the circuits, every detail of the fabrication process needs to be optimized. Here we reveal that the junction-resistance (R N) variations of Al/AlO x /Al JJs are affected by the metal deposition on the sidewall of the resist mask during shadow evaporation. The effect is reproduced in numerical simulation using a simple model taking into account the resist structure and the evaporation angle. To overcome the issue, we introduce a two-step shadow evaporation method to reduce the variation of R N. As a result, the coefficient of variations across a 3-inch wafer decreases from 6.7% to 4.5%, achieving 1.1% in a chip with an area of 10 mm × 10 mm. This method is promising for developing large-scale superconducting quantum computers.
As quantum processors scale to large qubit numbers, device-to-device variability emerges as a critical challenge. Superconducting qubits are commonly realized using Al/AlOx_{\text{x}}x​/Al Josephson junctions operating in the tunneling regime, where even minor variations in device geometry can lead to substantial performance fluctuations. In this work, we develop a quantitative model for the variability of the Josephson energy EJE_{J}EJ​ induced by interface roughness at the Al/AlOx_{\text{x}}x​ interfaces. The roughness is modeled as a Gaussian random field characterized by two parameters: the root-mean-square roughness amplitude σσσ and the transverse correlation length ξξξ. These parameters are extracted from the literature and molecular dynamics simulations. Quantum transport is treated using the Ambegaokar--Baratoff relation combined with a local thickness approximation. Numerical simulations over 5,0005,0005,000 Josephson junctions show that EJE_{J}EJ​ follows a log-normal distribution. The mean value of EJE_{J}EJ​ increases with σσσ and decreases slightly with ξξξ, while the variance of EJE_{J}EJ​ increases with both σσσ and ξξξ. These results paint a quantitative and intuitive picture of Josephson energy variability induced by surface roughness, with direct relevance for junction design.
Abstract Josephson superconducting qubits and parametric amplifiers are prominent examples of superconducting quantum circuits that have shown rapid progress in recent years. As such devices become more complex, the requirements for reproducibility of their electrical properties across a chip are being tightened. Critical current of the Josephson junction Ic is the essential electrical parameter in a chip. So, its variation is to be minimized. According to the Ambegaokar–Baratoff formula, critical current is related to normal-state resistance, which can be measured at room temperature. In this study, we focused on the dominant source of non-uniformity for the Josephson junction critical current–junction area variation. We optimized Josephson junction fabrication process and demonstrated resistance variation of 9.8–4.4% and 4.8–2.3% across 22 × 22 mm2 and 5 × 10 mm2 chip areas, respectively. For a wide range of junction areas from 0.008 to 0.12 μm2, we ensure a small linewidth standard deviation of 4 nm measured over 4500 junctions with linear dimensions from 80 to 680 nm. We found that the dominate source of junction area variation limiting Ic{\mathrm{I}}_{\mathrm{c}}Ic​ I c reproducibility is the imperfection of the evaporation system. The developed fabrication process was tested on superconducting highly coherent transmon qubits (T1 > 100 μs) and a nonlinear asymmetric inductive element parametric amplifier.
Abstract Quantum bits, or qubits, are an example of coherent circuits envisioned for next-generation computers and detectors. A robust superconducting qubit with a coherent lifetime of O(100 µs) is the transmon: a Josephson junction functioning as a non-linear inductor shunted with a capacitor to form an anharmonic oscillator. In a complex device with many such transmons, precise control over each qubit frequency is often required, and thus variations of the junction area and tunnel barrier thickness must be sufficiently minimized to achieve optimal performance while avoiding spectral overlap between neighboring circuits. Simply transplanting our recipe optimized for single, stand-alone devices to wafer-scale (producing 64, 1x1 cm dies from a 150 mm wafer) initially resulted in global drifts in room-temperature tunneling resistance of ± 30%. Inferring a critical current I c variation from this resistance distribution, we present an optimized process developed from a systematic 38 wafer study that results in < 3.5% relative standard deviation (RSD) in critical current ( ≡ σ I c / I c ) for 3000 Josephson junctions (both single-junctions and asymmetric SQUIDs) across an area of 49 cm2. Looking within a 1x1 cm moving window across the substrate gives an estimate of the variation characteristic of a given qubit chip. Our best process, utilizing ultrasonically assisted development, uniform ashing, and dynamic oxidation has shown σ I c / I c = 1.8% within 1x1 cm, on average, with a few 1x1 cm areas having σ I c / I c < 1.0% (equivalent to σ f / f < 0.5%). Such stability would drastically improve the yield of multi-junction chips with strict critical current requirements.