High-coherence, fault-tolerant and scalable quantum computing architectures with unprecedented long coherence times, faster gates, low losses and low bit-flip errors may be one of the only ways forward to achieve the true quantum advantage. In this context, high-frequency high-coherence (HCQC) qubits with new high-performance topologies could be a significant step towards efficient and high-fidelity quantum computing by facilitating compact size, higher scalability and higher than conventional operating temperatures. Although transmon type qubits are designed and manufactured routinely in the range of a few Giga-Hertz, normally from 4 to 6 GHz (and, at times, up to around 10GHz), achieving higher-frequency operation has challenges and entails special design and manufacturing considerations. This report presents the proposal and preliminary design of an 8-qubit transmon (with possible upgrade to up to 72 qubits on a chip) architecture working beyond an operation frequency of 10GHz, as well as presents a new connection topology. The current design spans a range of around 11 to 13.5 GHz (with a possible full range of 9-12GHz at the moment), with a central optimal operating frequency of 12.0 GHz, with the aim to possibly achieve a stable, compact and low-charge-noise operation, as lowest as possible as per the existing fabrication techniques. The aim is to achieve average relaxation times of up to 1.9ms with average quality factors of up to 2.75 x 10^7 after trials, while exploiting the new advances in superconducting junction manufacturing using tantalum and niobium/aluminum/aluminum oxide tri-layer structures on high-resistivity silicon substrates (carried out elsewhere by other groups and referred in this report).
High-coherence, fault-tolerant and scalable quantum computing architectures with unprecedented long coherence times, faster gates, low losses and low bit-flip errors may be one of the only ways forward to achieve the true quantum advantage. In this context, high-frequency high-coherence (HCQC) qubits with new high-performance topologies could be a significant step towards efficient and high-fidelity quantum computing by facilitating compact size, higher scalability and higher than conventional operating temperatures. Although transmon type qubits are designed and manufactured routinely in the range of a few Giga-Hertz, normally from 4 to 6 GHz (and, at times, up to around 10GHz), achieving higher-frequency operation has challenges and entails special design and manufacturing considerations. This report presents the proposal and preliminary design of an 8-qubit transmon (with possible upgrade to up to 72 qubits on a chip) architecture working beyond an operation frequency of 10GHz, as well as presents a new connection topology. The current design spans a range of around 11 to 13.5 GHz (with a possible full range of 9-12GHz at the moment), with a central optimal operating frequency of 12.0 GHz, with the aim to possibly achieve a stable, compact and low-charge-noise operation, as lowest as possible as per the existing fabrication techniques. The aim is to achieve average relaxation times of up to 1.9ms with average quality factors of up to 2.75 x 10^7 after trials, while exploiting the new advances in superconducting junction manufacturing using tantalum and niobium/aluminum/aluminum oxide tri-layer structures on high-resistivity silicon substrates (carried out elsewhere by other groups and referred in this report).
The technological development of hardware heading toward universal fault-tolerant quantum computation requires a large-scale processing unit with high performance. While fluxonium qubits are promising with high coherence and large anharmonicity, their scalability has not been systematically explored. In this work, we propose a superconducting quantum information processor based on compact high-coherence fluxoniums with suppressed crosstalk, reduced design complexity, improved operational efficiency, high-fidelity gates, and resistance to parameter fluctuations. In this architecture, the qubits are readout dispersively using individual resonators connected to a common bus and manipulated via combined on-chip RF and DC control lines, both of which can be designed to have low crosstalk. A multi-path coupling approach enables exchange interactions between the high-coherence computational states and at the same time suppresses the spurious static ZZ rate, leading to fast and high-fidelity entangling gates. We numerically investigate the cross resonance controlled-NOT and the differential AC-Stark controlled-Z operations, revealing low gate error for qubit-qubit detuning bandwidth of up to 1 GHz. Our study on frequency crowding indicates high fabrication yield for quantum processors consisting of over thousands of qubits. In addition, we estimate low resource overhead to suppress logical error rate using the XZZX surface code. These results promise a scalable quantum architecture with high performance for the pursuit of universal quantum computation.
Designing a qubit architecture is one of the most critical challenges in achieving scalable and fault-tolerant quantum computing as the performance of a quantum computer is heavily dependent on the coherence times, connectivity and low noise environments. Superconducting qubits have emerged as a frontrunner among many competing technologies, primarily because of their speed of operations, relatively well-developed and offer a promising path toward scalability. Here, we address the challenges of optimizing superconducting qubit hardware through the development of a comprehensive theoretical framework that spans the entire process - from design to the calibration of hardware through quantum gate execution. We develop this framework in four key steps: circuit design, electromagnetic analysis, spectral analysis, and pulse sequencing with calibration. We first refine the qubit's core components - such as capacitance, Josephson junctions, and resonators - to set the foundation for strong performance. The electromagnetic analysis, using the Lumped Oscillator model, allows us to map out the capacitance matrix, ensuring that we minimize spectral dispersion while maximizing coherence times. Following this, we conduct spectral analysis to fine-tune the qubit's frequency spectrum and coherence properties, ensuring that the qubit parameters are optimized. Finally, we focus on pulse sequencing, including pulse-width optimization, DRAG optimization, and randomized benchmarking, to achieve high gate fidelity. We applied this framework to both Transmon and Fluxonium qubits, obtaining results that closely match those found in experimental studies. This work provides a detailed and practical approach to the design, optimization, and calibration of superconducting qubits, contributing to the broader effort to develop scalable quantum computing technologies.
Superconducting qubits are a leading platform for quantum computation, yet decoherence and scalability challenges continue to limit progress toward fault-tolerant systems. This review synthesizes research on architectures, noise sources, and error correction to clarify performance trade-offs and guide development. The transition from Transmon to Fluxonium has dramatically improved qubit performance, achieving millisecond-scale coherence times. However, this success reveals a fundamental limit of coherence now being primarily restricted by the physical properties of the materials, specifically dielectric losses occurring at the Josephson junction leads and within the surrounding materials. As overcoming these material limits becomes increasingly difficult, system-level engineering determines whether high-coherence qubits can scale.Scaling quantum systems is difficult because current cooling and control systems create too much heat and this forces a shift to integrated digital superconducting circuits and cryogenic light-based links. While these hardware challenges restrict scaling, experiments in error correction show that logical qubits can already outperform physical ones. For example, a distance-7 surface code improved logical qubit lifetime by 2.4×. Achieving practical fault tolerance, however, requires moving beyond simple error models. Future systems must combine techniques like Dynamical Decoupling and Machine Learning-based Optimal Control with dynamic classical control capable of handling complex, correlated faults such as Multi-Bit Burst Errors. Progress in materials, cryogenic system integration for control, and adaptive error management must advance together to realize scalable, high-fidelity quantum hardware.
Quantum computation has emerged as a prominent research field with the potential to revolutionize information processing. Recent advancements have focused on extending qubit coherence times and enhancing error correction and fault-tolerant protocols, achieving coherence time to gate time ratios as high as 10⁸ and reducing error rates to as low as 0.143% ± 0.003% per cycle for 101 qubit system. The next critical challenge lies in scaling up qubit systems to support large-scale quantum computation that exceeds the performance of classical supercomputer. In this study, we summarize the working mechanisms, physical properties, gate operations, and limitations of three leading qubit platforms—superconducting qubits, trapped-ion qubits, and neutral atom qubits. Through a systematic comparison, we identify the key challenges that hinder qubit system scalability. Finally, we outline future research directions to address these challenges, including exploring the fundamental physics underpinning long coherence times, improving control tools such as laser systems, enhancing material quality and fabrication precision, and investigating hybrid quantum architectures. We hope this study offers a valuable perspective for researchers working toward the development of scalable and reliable quantum computing systems.
While quantum computation has the potential to revolutionize the scientific community, to date no architecture has been developed which offers the necessary combination of high coherence times and massive scalability. Superconducting flux qubits satisfy the second requirement well but to date useful devices are limited to coherence times of typically only a few &mus. In this dissertation we examine the possibilities of improving the coherence performance of the flux qubit to the levels required for fault-tolerant quantum computation. We find that coherence times for many devices are limited by photon-induced quasiparticles and mitigation of these quasiparticles increases coherence times by more than a factor of two. Beyond this, however, we find little improvement in flux qubit performance compared to prior results. Despite improved fabrication techniques and varied device designs we find flux qubit coherence times are still typically below 5 &mus. Furthermore, wide device-to-device variations are observed which prevent effective scaling of the flux qubit to quantum information circuits.Based on the proposal by You, et al. we develop of a capacitively-shunted version of the flux qubit called the C-shunt flux qubit. With the addition of a capacitive shunt across the small junction of the flux qubit we are able to reduce the amplitude sensitivity to both charge and flux noise by more than a factor of three. The result is a predicted ten-fold enhancement in the coherence times compared to the unshunted flux qubit. At the same time we preserve much of the anharmonicity of the flux qubit resulting in a device with coherence times comparable to modern transmons but with a factor of four better anharmonicity and more flexible coupling configurations.By using a high-quality MBE aluminum shunt process on an annealed sapphire substrate coupled with a more conventional electron-beam-evaporated aluminum Josephson junction process we fabricate hybrid C-shunt flux qubits. We also incorporate a new bridgeless junction technique which offers more robust and repeatable fabrication processing. This technique enables improved accuracy of the junction sizing, a trait which will become essential as we move to multi-qubit experiments. T1 and T2 times for these C-shunt devices reach in excess of 40 &mus at degeneracy, achieving the predicted ten-fold improvement based on the reduced noise sensitivity. At the same time we see decreased device-to-device variation with typical T1 times exceeding 20&ndash25 &mus at all bias points. Combined with the high anharmonicity and standard planar fabrication techniques these coherence times make the C-shunt flux qubit a competitive candidate for fault-tolerant quantum computation.
Abstract Superconducting qubits are multilevel micro-fabricated artificial atoms based on superconducting materials. They are mainly operated in the low microwave frequency range (2–8 GHz) and require to be cooled below 20 mK to maintain quantum coherence. They enable precise engineering of transition frequencies and coupling strengths, facilitating advancements in quantum information processing and light-matter interactions. The field has evolved from early devices, characterized by short coherence times, to modern architectures with improved noise resilience, scalability, and fidelity. Better performances have been achieved through innovations in materials, fabrication, control electronics, and circuit design, enabling qubits with millisecond coherence times and gate fidelities exceeding 99.9%. However, challenges remain in mitigating two-level system defects, scaling devices, and addressing the cryogenic and infrastructure needs of larger quantum processing units. Current research focuses on modular and scalable architectures, error correction, and application. The field’s progress highlights the potential for superconducting qubits to drive advancements in quantum computation.