The challenge of scaling quantum computers to gain computational power is expected to lead to architectures with multiple connected quantum processing units (QPUs), commonly referred to as Distributed Quantum Computing (DQC). In parallel, there is a growing momentum toward treating quantum computers as accelerators, integrating them into the heterogeneous architectures of high-performance computing (HPC) environments. This work combines these two foreseeable futures in CUNQA, an open-source DQC emulator designed for HPC environments that allows testing, evaluating and studying DQC in HPC before it even becomes real. It implements the three DQC models of no-communication, classical-communication and quantum-communication; which will be examined in this work. Addressing programming considerations, explaining emulation and simulation details, and delving into the specifics of the implementation will be part of the effort. The well-known Quantum Phase Estimation (QPE) algorithm is used to demonstrate and analyze the emulation of the models. To the best of our knowledge, CUNQA is the first tool designed to emulate the three DQC schemes in an HPC environment.
The challenge of scaling quantum computers to gain computational power is expected to lead to architectures with multiple connected quantum processing units (QPUs), commonly referred to as Distributed Quantum Computing (DQC). In parallel, there is a growing momentum toward treating quantum computers as accelerators, integrating them into the heterogeneous architectures of high-performance computing (HPC) environments. This work combines these two foreseeable futures in CUNQA, an open-source DQC emulator designed for HPC environments that allows testing, evaluating and studying DQC in HPC before it even becomes real. It implements the three DQC models of no-communication, classical-communication and quantum-communication; which will be examined in this work. Addressing programming considerations, explaining emulation and simulation details, and delving into the specifics of the implementation will be part of the effort. The well-known Quantum Phase Estimation (QPE) algorithm is used to demonstrate and analyze the emulation of the models. To the best of our knowledge, CUNQA is the first tool designed to emulate the three DQC schemes in an HPC environment.
The growing demand for large-scale quantum computers is pushing research on Distributed Quantum Computing (DQC). Recent experimental efforts have demonstrated some of the building blocks for such a design. DQC systems are clusters of quantum processing units (QPUs) connected by means of quantum network infrastructures. Their extension ranges from the single box to the geographical scale. Furthermore, they can be integrated with classical High Performance Computing systems. Simulation modeling of DQC architectures provides a safe way to test and explore different what-if scenarios. Many simulation tools have been developed to support the research community in designing and evaluating quantum computer and quantum network technologies, including hardware, protocols, and applications. However, a framework for DQC simulation putting equal emphasis on computational and networking aspects has never been proposed, so far. In this paper, a design framework for DQC simulation is presented, whose core component is an Execution Manager that schedules DQC jobs for running on networked quantum computers. Two metrics are proposed for evaluating the impact of the job scheduling algorithms with respect to QPU utilization and quantum network utilization, beyond the traditional concept of makespan. The discussion is supported by a DQC job scheduling example, where two different strategies are compared in terms of the proposed metrics.
Scalable quantum computing requires architectural solutions beyond monolithic processors. Distributed quantum computing (DQC) addresses this challenge by interconnecting smaller quantum nodes through quantum communication protocols, enabling collaborative computation. While several experimental and theoretical proposals for DQC exist, emulator platforms are essential tools for exploring their feasibility under realistic conditions. In this work, we introduce a benchmarking framework to evaluate DQC emulators using a distributed implementation of the inverse Quantum Fourier Transform (QFT†) as a representative test case, which enables efficient phase recovery from pre-encoded Fourier states. The QFT is partitioned across nodes using teleportation-based protocols, and performance is analyzed in terms of execution time, memory usage, and fidelity with respect to a monolithic baseline.
As part of this work, we review a broad range of emulators, identifying their capabilities and limitations for programming distributed quantum algorithms. Many platforms either lacked support for teleportation protocols or required complex workarounds. Consequently, we select and benchmark four representative emulators: Qiskit Aer, SquidASM, Interlin-q, and SQUANCH. They differ significantly in their support for discrete-event simulation, quantum networking, noise modeling, and parallel execution. Our results highlight the trade-offs between architectural fidelity and simulation scalability, providing a foundation for future emulator development and the validation of distributed quantum protocols. This framework can be extended to support additional algorithms and emulators.
As quantum computers scale, single-chip architectures face inherent limitations in qubit count. This drives the need for modular quantum computing and quantum data centers (QDCs), where multiple quantum processor units (QPUs) are interconnected to enable the distributed execution of a quantum algorithm. However, evaluating distributed quantum computing (DQC) architectures is challenging. Classical simulation is limited by the exponential growth of the state vector, limiting its ability to model large systems and realistically capture hardware noise and timing. Meanwhile, implementing QDC introduces interconnect noise challenges such as transduction inefficiency and optical fiber loss. In this work, we introduce a hardware-based emulation framework by partitioning a single quantum processor’s qubit coupling map into multiple logical QPUs. We show how noise arising from transduction and optical fibers can be modeled by adding an ancilla qubit representing the environment, based on quantum collision dynamics. This model is then translated into a gate-based circuit, in which the couplings between each portion act as controllable noisy quantum communication channels. We demonstrate the framework on IBM quantum hardware by executing remote gates under controllable communication noise. To highlight the flexibility of the platform, we further replicate the implementation results of the distributed Grover’s search algorithm on an ion-trap system. Finally, we test a larger circuit, i.e., a five-qubit quantum Fourier transform (QFT), achieving reasonable fidelity across logical QPUs. Overall, the framework provides a scalable hardware-level emulation platform that captures noise sources through physical qubits and is compatible with any platform supporting the Qiskit SDK.
As distributed quantum computing (DQC) offers a leading path towards scalable quantum computation, the ability to benchmark distributed algorithms under realistic conditions becomes critical for system co-design. However, without access to physical systems, researchers lack tools to evaluate distribution protocols. We introduce Q-DICE (Quantum Distributed Interconnect Compiler and Emulator), a hardware-aware emulation environment for benchmarking distributed quantum circuits on classical simulators and on NISQ-era monolithic hardware. This work provides three core contributions: (1) a programmatic scheme to construct distributed QPU backends, utilizing two novel techniques - QPU slicing and stitching - to facilitate distributed circuit mapping, (2) a methodology for modeling nonlocal link noise using physically motivated Kraus operators and stochastic error channels, and (3) a boundary-aware circuit mapping algorithm enforcing distributed QPU topology constraints during transpilation. Together, these components constitute a distribution-aware compiler and noise-modeling engine that faithfully enforces the physical limitations of distributed quantum hardware within existing execution environments. We validate Q-DICE against a multitude of experimentally demonstrated quantum circuits, including a distributed Grover's search on optically linked trapped-ion hardware, achieving a worst-case fidelity deviation of 4% between simulated and experimental results. These findings demonstrate Q-DICE's capacity to accurately reproduce real distributed quantum system behavior across platforms, streamlining experimentation with distributed quantum algorithms and architectures.
Quantum computing in the NISQ era requires advanced emulation tools to facilitate the development and validation of complex quantum algorithms, as current quantum devices remain too noisy and resource-limited. This work presents a comprehensive review of quantum emulation software available for HPC centers using various comparison metrics to evaluate parallelization, precision, acceleration via Graphics Processing Unit (GPU), emulation with noise, among others. The comparative analysis evaluates four quantum emulation frameworks (QuEST, Qaptiva HPC, CUDA-Q, and PennyLane) across three hardware platforms with distinct characteristics: two HPC clusters (Spartan-Eviden and Joliot-Curie TGCC) and one quantum emulation appliance (Eviden Qaptiva 804). The scope of this analysis is fundamentally tied to the state-vector emulation paradigm. The experimental results of our evaluation reveal that performance depends on classical hardware configuration and circuit characteristics, that is, CUDA-Q excels in single-GPU environments, while Qaptiva HPC shows advantages in distributed multi-node configurations (both CPU and GPU).
Quantum computing has made substantial progress in recent years; however, its scalability remains constrained on a monolithic quantum processing unit (QPU). Distributed quantum computing (DQC) offers a pathway by coordinating multiple QPUs to execute large-scale circuits. Yet, DQC still faces practical barriers, as its realization depends on advances in hardware-level components such as quantum transducers and high-fidelity entanglement-distribution modules. While these technologies continue to improve, mature DQC platforms remain unavailable. In the meantime, researchers need to assess the benefits of DQC and evaluate emerging DQC designs, but the software ecosystem lacks a circuit-level simulator that models heterogeneous backends, noisy connections, and distributed execution. To fill this gap, this paper proposes SimDisQ, the first end-to-end circuit-level DQC simulator, composed of a set of novel DQC-oriented automated simulation toolkits and communication noise models that can interoperate with existing toolkits in mainstream quantum software ecosystems. Leveraging circuit-level simulation capabilities, SimDisQ enables quantitative exploration of architectural design trade-offs, communication fidelity constraints, and new circuit optimization challenges introduced by DQC, providing a foundation for future research in this promising direction. Benchmarking experiments using SimDisQ respond to a couple of open questions in the community; for example, noisy simulation of superconducting and trapped-ion qubits, with a reasonable entanglement-distribution fidelity, reveal that heterogeneous QPUs can indeed yield higher execution fidelity.