Challenges
Datasets
Workspaces
Papers
Discussions
Leaderboard
Log inSign up
Challenges
Datasets
Workspaces
Papers
Discussions
Leaderboard
Blog
Job Board
Q3AS

© 2026 Aqora Quantum S.A.S.

TermsPrivacyLegal Notice

arXiv:2505.13587

Fast correlated decoding of transversal logical algorithms

Madelyn Cain, Dolev Bluvstein, Chen Zhao, Gu, Shouzhen, Nishad Maskara, Kalinowski, Marcin, Alexandra A. Geim, Aleksander Kubica, Mikhail D. Lukin, Hengyun Zhou

Published May 19, 2025• 1 citation
arXivHTMLPDF

Abstract

Quantum error correction (QEC) is required for large-scale computation, but incurs a significant resource overhead. Recent advances have shown that by jointly decoding logical qubits in algorithms composed of transversal gates, the number of syndrome extraction rounds can be reduced by a factor of the code distance $d$, at the cost of increased classical decoding complexity. Here, we reformulate the problem of decoding transversal circuits by directly decoding relevant logical operator products as they propagate through the circuit. This procedure transforms the decoding task into one closely resembling that of a single-qubit memory propagating through time. The resulting approach leads to fast decoding and reduced problem size while maintaining high performance. Focusing on the surface code, we prove that this method enables fault-tolerant decoding with minimum-weight perfect matching, and benchmark its performance on example circuits including magic state distillation. We find that the threshold is comparable to that of a single-qubit memory, and that the total decoding run time can be, in fact, less than that of conventional lattice surgery. Our approach enables fast correlated decoding, providing a pathway to directly extend single-qubit QEC techniques to transversal algorithms.

DOI
10.48550/arxiv.2505.13587

Related papers

Correlated Decoding of Logical Algorithms with Transversal Gates

Madelyn Cain, Chen Zhao, Hengyun Zhou +5 more

Quantum error correction is believed to be essential for scalable quantum computation, but its implementation is challenging due to its considerable space-time overhead. Motivated by recent experiments demonstrating efficient manipulation of logical qubits using transversal gates [Bluvstein et al., Nature (London) 626, 58 (2024)NATUAS0028-083610.1038/s41586-023-06927-3], we show that the performance of logical algorithms can be substantially improved by decoding the qubits jointly to account for error propagation during transversal entangling gates. We find that such correlated decoding improves the performance of both Clifford and non-Clifford transversal entangling gates, and explore two decoders offering different computational runtimes and accuracies. In particular, by leveraging the deterministic propagation of stabilizer measurement errors, we find that correlated decoding enables the number of noisy syndrome extraction rounds between gates to be reduced from O(d) to O(1) in transversal Clifford circuits, where d is the code distance. We verify numerically that this approach substantially reduces the space-time cost of deep logical Clifford circuits. These results demonstrate that correlated decoding provides a major advantage in early fault-tolerant computation, as realized in recent experiments, and further indicate it has considerable potential to reduce the space-time cost in large-scale logical algorithms.

arXiv:2403.03272•Physical Review Letters•Dec 11, 2024•37 citations

Error Correction of Transversal cnot Gates for Scalable Surface-Code Computation

Kaavya Sahay, Yingjia Lin, Shilin Huang +2 more

Recent experimental advances have made it possible to implement logical multiqubit transversal gates on surface codes in a multitude of platforms. A transversal controlled- (t) gate on two surface codes introduces correlated errors across the code blocks and thus requires modified decoding compared to established methods of decoding surface-code quantum memory (SCQM) or lattice-surgery operations. In this work, we examine and benchmark the performance of three different decoding strategies for the t for scalable fault-tolerant quantum computation. In particular, we present a low-complexity decoder based on minimum-weight perfect matching (MWPM) that achieves the same threshold as the SCQM MWPM decoder. We extend our analysis with a study of tailored decoding of a transversal-teleportation circuit, along with a comparison between the performance of lattice-surgery and transversal operations under Pauli- and erasure-noise models. Our investigation builds toward systematic estimation of the cost of implementing large-scale quantum algorithms based on transversal gates in the surface code.

arXiv:2408.01393•PRX Quantum•May 7, 2025•14 citations

Scalable Decoding Protocols for Fast Transversal Logic in the Surface Code

Mark L. Turner, Earl T. Campbell, Ophelia Crawford +2 more

Atomic, molecular and optical (AMO) approaches to quantum computing are promising due to their increased connectivity, long coherence times and apparent scalability. However, they have a significantly reduced cadence of syndrome extraction compared to superconducting devices, a potentially crippling slow-down given the substantial logical gate counts required for quantum advantage. Transversal logic, which exploits higher connectivity, has the potential to significantly speed up the logical clock rate by reducing the number of syndrome extraction rounds required, but current decoders for fast transversal logic are not scalable. This is not just because existing decoders are too slow to handle the large decoding volumes resulting from fast logic; transversal logic breaks the key structural properties that make real-time decoding of lattice surgery efficient. We introduce two windowed decoding protocols for transversal logic in the surface code that restore modularity and locality to the decoding problem. Using our protocols, we show that, with a very small space overhead, our scalable decoders unlock an order of magnitude speedup for transversal logic compared to lattice surgery. Taken together, our results provide key evidence for the viability of large-scale algorithms on AMO qubits.

arXiv:2505.23567•PRX Quantum•Dec 15, 2025•2 citations

Decoding across Transversal Clifford Gates in the Surface Code

Marc Serra-Peralta, Mackenzie H. Shaw, Barbara M. Terhal

Transversal logical gates offer the opportunity for fast and low-noise logic, particularly when interspersed by a single round of parity check measurements of the underlying code. Using such circuits for the surface code requires decoding across logical gates, complicating the decoding task. We show how one can decode across an arbitrary sequence of transversal gates for the unrotated surface code, using a fast “logical observable” minimum-weight perfect matching-based decoder, and benchmark its performance in Clifford circuits under circuit-level noise. We propose logical observable matching decoders to address the problem of fully efficient decoding: our basic windowed decoder is computationally efficient under the restriction of quiescent (slow) resets. Our “advanced” two-step windowed decoder can be computationally inefficient but allows fast resets. For both windowed decoders we identify errors which scale sublinearly in d —depending on the structure of the circuit—which can lead to logical failure, and we propose methods to adapt the decoding to remove such failures. Our work highlights the complexity and interest in efficient decoding of fast logic for the surface code.

arXiv:2505.13599•PRX Quantum•Dec 4, 2025•4 citations

Neural Decoders Reduce Logical Error Rates in Surface Code Quantum Systems

Lukas Schneider, Haruki Tanaka

Fault-tolerant quantum computation critically depends on the ability to detect and correct physical qubit errors faster than they accumulate. The surface code (SC) has emerged as the most experimentally promising quantum error correction (QEC) framework due to its high threshold and local stabilizer structure, yet its practical performance is bottlenecked by decoder efficiency. Traditional decoding approaches such as minimum-weight perfect matching (MWPM) achieve near-optimal accuracy under independent noise but struggle with correlated errors, circuit-level noise, and real-time latency constraints. This paper investigates how neural network (NN)-based decoders reduce logical error rates in SC quantum systems by learning complex syndrome-to-correction mappings from data. We propose a hybrid convolutional-recurrent neural architecture that processes stabilizer measurement syndromes across both spatial and temporal dimensions, enabling the decoder to capture correlated error patterns inherent in realistic hardware. Systematic simulations under depolarizing, biased, and circuit-level noise models demonstrate that the proposed neural decoder achieves a logical error rate reduction of up to 41.3% compared to MWPM at a physical error rate of p = 0.008, while maintaining sub-millisecond decoding latency compatible with superconducting qubit cycle times. These results establish that data-driven neural decoders represent a scalable and hardware-compatible pathway toward achieving the logical error rates required for practical fault-tolerant quantum computing.

Frontiers in Applied Physics and Mathematics•Mar 25, 2026•0 citations

Low Latency GNN Accelerator for Quantum Error Correction

Alessio Cicero, Luigi Altamura, Moritz Lange +2 more

Quantum computers can solve selected problems more efficiently than classical computers, but current devices are limited by high physical error rates. Quantum Error Correction (QEC) mitigates this by encoding many physical qubits into a logical qubit, with the surface code among the most widely studied approaches. Since syndrome measurements are produced continuously, the decoder must process them fast enough to avoid becoming a system bottleneck, making real-time decoding essential for fault-tolerant quantum computing. While most state-of-the-art real-time decoders rely on Minimum-Weight Perfect Matching (MWPM), we instead use a high-accuracy Graph Neural Network (GNN) that trades higher computational cost for lower logical error rates. To make this GNN practical for real-time decoding, we apply algorithm-hardware co-design. We reduce complexity through hardware-guided pruning and retraining, producing two hardware-friendly models that reduce parameter count by $3.1\times$ and $6.5\times$. These target, respectively, an average decoding latency of one syndrome cycle and a worst-case latency within one syndrome cycle. We further reduce hardware cost using input-graph filtering and post-training quantization. Based on these optimized models, we propose an FPGA-based architecture for low-latency inference and real-time decoding. Evaluated on surface codes up to distance 7 under circuit-level noise at physical error rate $p=10^{-3}$, our decoder outperforms MWPM in decoding accuracy for both average-latency and max-latency settings. It reduces logical error rate by 40% at $1μs$ average latency, and by 13% under a strict $1μs$ deadline.

quant-pharXiv:2603.22149•Mar 24, 2026•0 citations
Quantum error correction (QEC) is required for large-scale computation, but incurs a significant resource overhead. Recent advances have shown that by jointly decoding logical qubits in algorithms composed of transversal gates, the number of syndrome extraction rounds can be reduced by a factor of the code distance ddd, at the cost of increased classical decoding complexity. Here, we reformulate the problem of decoding transversal circuits by directly decoding relevant logical operator products as they propagate through the circuit. This procedure transforms the decoding task into one closely resembling that of a single-qubit memory propagating through time. The resulting approach leads to fast decoding and reduced problem size while maintaining high performance. Focusing on the surface code, we prove that this method enables fault-tolerant decoding with minimum-weight perfect matching, and benchmark its performance on example circuits including magic state distillation. We find that the threshold is comparable to that of a single-qubit memory, and that the total decoding run time can be, in fact, less than that of conventional lattice surgery. Our approach enables fast correlated decoding, providing a pathway to directly extend single-qubit QEC techniques to transversal algorithms.
Quantum error correction is believed to be essential for scalable quantum computation, but its implementation is challenging due to its considerable space-time overhead. Motivated by recent experiments demonstrating efficient manipulation of logical qubits using transversal gates [Bluvstein et al., Nature (London) 626, 58 (2024)NATUAS0028-083610.1038/s41586-023-06927-3], we show that the performance of logical algorithms can be substantially improved by decoding the qubits jointly to account for error propagation during transversal entangling gates. We find that such correlated decoding improves the performance of both Clifford and non-Clifford transversal entangling gates, and explore two decoders offering different computational runtimes and accuracies. In particular, by leveraging the deterministic propagation of stabilizer measurement errors, we find that correlated decoding enables the number of noisy syndrome extraction rounds between gates to be reduced from O(d) to O(1) in transversal Clifford circuits, where d is the code distance. We verify numerically that this approach substantially reduces the space-time cost of deep logical Clifford circuits. These results demonstrate that correlated decoding provides a major advantage in early fault-tolerant computation, as realized in recent experiments, and further indicate it has considerable potential to reduce the space-time cost in large-scale logical algorithms.
Recent experimental advances have made it possible to implement logical multiqubit transversal gates on surface codes in a multitude of platforms. A transversal controlled- (t) gate on two surface codes introduces correlated errors across the code blocks and thus requires modified decoding compared to established methods of decoding surface-code quantum memory (SCQM) or lattice-surgery operations. In this work, we examine and benchmark the performance of three different decoding strategies for the t for scalable fault-tolerant quantum computation. In particular, we present a low-complexity decoder based on minimum-weight perfect matching (MWPM) that achieves the same threshold as the SCQM MWPM decoder. We extend our analysis with a study of tailored decoding of a transversal-teleportation circuit, along with a comparison between the performance of lattice-surgery and transversal operations under Pauli- and erasure-noise models. Our investigation builds toward systematic estimation of the cost of implementing large-scale quantum algorithms based on transversal gates in the surface code.
Atomic, molecular and optical (AMO) approaches to quantum computing are promising due to their increased connectivity, long coherence times and apparent scalability. However, they have a significantly reduced cadence of syndrome extraction compared to superconducting devices, a potentially crippling slow-down given the substantial logical gate counts required for quantum advantage. Transversal logic, which exploits higher connectivity, has the potential to significantly speed up the logical clock rate by reducing the number of syndrome extraction rounds required, but current decoders for fast transversal logic are not scalable. This is not just because existing decoders are too slow to handle the large decoding volumes resulting from fast logic; transversal logic breaks the key structural properties that make real-time decoding of lattice surgery efficient. We introduce two windowed decoding protocols for transversal logic in the surface code that restore modularity and locality to the decoding problem. Using our protocols, we show that, with a very small space overhead, our scalable decoders unlock an order of magnitude speedup for transversal logic compared to lattice surgery. Taken together, our results provide key evidence for the viability of large-scale algorithms on AMO qubits.
Transversal logical gates offer the opportunity for fast and low-noise logic, particularly when interspersed by a single round of parity check measurements of the underlying code. Using such circuits for the surface code requires decoding across logical gates, complicating the decoding task. We show how one can decode across an arbitrary sequence of transversal gates for the unrotated surface code, using a fast “logical observable” minimum-weight perfect matching-based decoder, and benchmark its performance in Clifford circuits under circuit-level noise. We propose logical observable matching decoders to address the problem of fully efficient decoding: our basic windowed decoder is computationally efficient under the restriction of quiescent (slow) resets. Our “advanced” two-step windowed decoder can be computationally inefficient but allows fast resets. For both windowed decoders we identify errors which scale sublinearly in d —depending on the structure of the circuit—which can lead to logical failure, and we propose methods to adapt the decoding to remove such failures. Our work highlights the complexity and interest in efficient decoding of fast logic for the surface code.
Fault-tolerant quantum computation critically depends on the ability to detect and correct physical qubit errors faster than they accumulate. The surface code (SC) has emerged as the most experimentally promising quantum error correction (QEC) framework due to its high threshold and local stabilizer structure, yet its practical performance is bottlenecked by decoder efficiency. Traditional decoding approaches such as minimum-weight perfect matching (MWPM) achieve near-optimal accuracy under independent noise but struggle with correlated errors, circuit-level noise, and real-time latency constraints. This paper investigates how neural network (NN)-based decoders reduce logical error rates in SC quantum systems by learning complex syndrome-to-correction mappings from data. We propose a hybrid convolutional-recurrent neural architecture that processes stabilizer measurement syndromes across both spatial and temporal dimensions, enabling the decoder to capture correlated error patterns inherent in realistic hardware. Systematic simulations under depolarizing, biased, and circuit-level noise models demonstrate that the proposed neural decoder achieves a logical error rate reduction of up to 41.3% compared to MWPM at a physical error rate of p = 0.008, while maintaining sub-millisecond decoding latency compatible with superconducting qubit cycle times. These results establish that data-driven neural decoders represent a scalable and hardware-compatible pathway toward achieving the logical error rates required for practical fault-tolerant quantum computing.
Quantum computers can solve selected problems more efficiently than classical computers, but current devices are limited by high physical error rates. Quantum Error Correction (QEC) mitigates this by encoding many physical qubits into a logical qubit, with the surface code among the most widely studied approaches. Since syndrome measurements are produced continuously, the decoder must process them fast enough to avoid becoming a system bottleneck, making real-time decoding essential for fault-tolerant quantum computing. While most state-of-the-art real-time decoders rely on Minimum-Weight Perfect Matching (MWPM), we instead use a high-accuracy Graph Neural Network (GNN) that trades higher computational cost for lower logical error rates. To make this GNN practical for real-time decoding, we apply algorithm-hardware co-design. We reduce complexity through hardware-guided pruning and retraining, producing two hardware-friendly models that reduce parameter count by 3.1×3.1\times3.1× and 6.5×6.5\times6.5×. These target, respectively, an average decoding latency of one syndrome cycle and a worst-case latency within one syndrome cycle. We further reduce hardware cost using input-graph filtering and post-training quantization. Based on these optimized models, we propose an FPGA-based architecture for low-latency inference and real-time decoding. Evaluated on surface codes up to distance 7 under circuit-level noise at physical error rate p=10−3p=10^{-3}p=10−3, our decoder outperforms MWPM in decoding accuracy for both average-latency and max-latency settings. It reduces logical error rate by 40% at 1μs1μs1μs average latency, and by 13% under a strict 1μs1μs1μs deadline.