Superconducting devices have enabled breakthrough performance in quantum sensing and ultralow-power computing. Nevertheless, the need for a cryoelectronics platform that can interface superconductor electronics with complementary metal-oxide-semiconductor (CMOS) devices has become increasingly evident in many cutting-edge applications. In this work, we present a three-terminal micrometer-wide superconducting-wire-based cryotron switch (wTron), fabricated using photolithography, that can directly interface with CMOS electronics. The wTron features an output impedance exceeding $1\phantom{\rule{0.2em}{0ex}}\mathrm{k}\mathrm{\ensuremath{\Omega}}$ and exhibits reduced sensitivity to ambient magnetic noise, similar to its nanoscale predecessor, the nanocryotron. In addition, its micrometer-wide wires support switching currents in the milliamp range, making it well suited to driving current-hungry resistive loads and highly capacitive CMOS loads. We demonstrate this capability by using the wTron to drive room-temperature CMOS electronics, including a light-emitting diode and a metal-oxide-semiconductor field-effect transistor (MOSFET) with a gate capacitance of 500 pF. We then examine the optimal design parameters required for wTrons to drive CMOS loads, such as MOSFETs, high-electron mobility transistors, and electro-optic modulators. Furthermore, to demonstrate the foundry readiness of the wTron, we fabricate wTrons using MIT Lincoln Laboratory's SFQ5ee superconducting process and characterize their switching behavior. Our work shows that the wTron will facilitate the interface between superconductor electronics and CMOS devices, thereby paving the way for the development of foundry-compatible cryoelectronic ecosystems to advance next-generation computing and quantum applications.
Superconducting devices have enabled breakthrough performance in quantum sensing and ultralow-power computing. Nevertheless, the need for a cryoelectronics platform that can interface superconductor electronics with complementary metal-oxide-semiconductor (CMOS) devices has become increasingly evident in many cutting-edge applications. In this work, we present a three-terminal micrometer-wide superconducting-wire-based cryotron switch (wTron), fabricated using photolithography, that can directly interface with CMOS electronics. The wTron features an output impedance exceeding 1k\ensuremathΩ and exhibits reduced sensitivity to ambient magnetic noise, similar to its nanoscale predecessor, the nanocryotron. In addition, its micrometer-wide wires support switching currents in the milliamp range, making it well suited to driving current-hungry resistive loads and highly capacitive CMOS loads. We demonstrate this capability by using the wTron to drive room-temperature CMOS electronics, including a light-emitting diode and a metal-oxide-semiconductor field-effect transistor (MOSFET) with a gate capacitance of 500 pF. We then examine the optimal design parameters required for wTrons to drive CMOS loads, such as MOSFETs, high-electron mobility transistors, and electro-optic modulators. Furthermore, to demonstrate the foundry readiness of the wTron, we fabricate wTrons using MIT Lincoln Laboratory's SFQ5ee superconducting process and characterize their switching behavior. Our work shows that the wTron will facilitate the interface between superconductor electronics and CMOS devices, thereby paving the way for the development of foundry-compatible cryoelectronic ecosystems to advance next-generation computing and quantum applications.
Abstract The development of superconducting qubit technology has shown great potential for the construction of practical quantum computers 1,2 . As the complexity of quantum processors continues to grow, the need for stringent fabrication tolerances becomes increasingly critical 3 . Utilizing advanced industrial fabrication processes could facilitate the necessary level of fabrication control to support the continued scaling of quantum processors. However, at present, these industrial processes are not optimized to produce high-coherence devices, nor are they a priori compatible with the approaches commonly used to make superconducting qubits. Here we demonstrate superconducting transmon qubits manufactured in a 300 mm complementary metal–oxide–semiconductor (CMOS) pilot line using industrial fabrication methods, with resulting relaxation and coherence times exceeding 100 μs. We show across-wafer, large-scale statistics of coherence, yield, variability and ageing that confirm the validity of our approach. The presented industry-scale fabrication process, which uses only optical lithography and reactive-ion etching, has a performance and yield in line with conventional laboratory-style techniques utilizing metal lift-off, angled evaporation and electron-beam writing 4 . Moreover, it offers the potential for further upscaling through three-dimensional integration 5 and more process optimization. This result marks the advent of an alternative and new, large-scale, truly CMOS-compatible fabrication method for superconducting quantum computing processors.
A number of current approaches to quantum and neuromorphic computing use superconductors as the basis of their platform or as a measurement component, and will need to operate at cryogenic temperatures. Semiconductor systems are typically proposed as a top-level control in these architectures, with low-temperature passive components and intermediary superconducting electronics acting as the direct interface to the lowest-temperature stages. The architectures, therefore, require a low-power superconductor-semiconductor interface, which is not currently available. Here we report a superconducting switch that is capable of translating low-voltage superconducting inputs directly into semiconductor-compatible (above 1,000 mV) outputs at kelvin-scale temperatures (1 K or 4 K). To illustrate the capabilities in interfacing superconductors and semiconductors, we use it to drive a light-emitting diode (LED) in a photonic integrated circuit, generating photons at 1 K from a low-voltage input and detecting them with an on-chip superconducting single-photon detector. We also characterize our device's timing response (less than 300 ps turn-on, 15 ns turn-off), output impedance (greater than 1 MΩ), and energy requirements (0.18 fJ/um^2, 3.24 mV/nW).
Abstract The development of superconducting qubit technology has shown great potential for the construction of practical quantum computers1, 2. As the complexity of quantum processors continues to grow, the need for stringent fabrication tolerances becomes increasingly critical3. Utilizing advanced industrial fabrication processes could facilitate the necessary level of fabrication control to support the continued scaling of quantum processors. However, at present, these industrial processes are not optimized to produce high-coherence devices, nor are they a priori compatible with the approaches commonly used to make superconducting qubits. Here we demonstrate superconducting transmon qubits manufactured in a 300 mm complementary metal–oxide–semiconductor (CMOS) pilot line using industrial fabrication methods, with resulting relaxation and coherence times exceeding 100 μs. We show across-wafer, large-scale statistics of coherence, yield, variability and ageing that confirm the validity of our approach. The presented industry-scale fabrication process, which uses only optical lithography and reactive-ion etching, has a performance and yield in line with conventional laboratory-style techniques utilizing metal lift-off, angled evaporation and electron-beam writing4. Moreover, it offers the potential for further upscaling through three-dimensional integration5 and more process optimization. This result marks the advent of an alternative and new, large-scale, truly CMOS-compatible fabrication method for superconducting quantum computing processors.
Abstract Integration with conventional electronics offers a straightforward and economical approach to upgrading existing superconducting technologies, such as scaling up superconducting detectors into large arrays and combining single flux quantum (SFQ) digital circuits with semiconductor logic gates and memories. However, direct output signals from superconducting devices (e.g., Josephson junctions) are usually not compatible with the input requirements of conventional devices (e.g., transistors). Here, we demonstrate the use of a single three-terminal superconducting-nanowire device, called the nanocryotron (nTron), as a digital comparator to combine SFQ circuits with mature semiconductor circuits such as complementary metal oxide semiconductor (CMOS) circuits. Since SFQ circuits can digitize output signals from general superconducting devices and CMOS circuits can interface existing CMOS-compatible electronics, our results demonstrate the feasibility of a general architecture that uses an nTron as an interface to realize a ‘super-hybrid’ system consisting of superconducting detectors, superconducting quantum electronics, CMOS logic gates and memories, and other conventional electronics.
Abstract The most promising quantum algorithms require quantum processors that host millions of quantum bits when targeting practical applications1. A key challenge towards large-scale quantum computation is the interconnect complexity. In current solid-state qubit implementations, an important interconnect bottleneck appears between the quantum chip in a dilution refrigerator and the room-temperature electronics. Advanced lithography supports the fabrication of both control electronics and qubits in silicon using technology compatible with complementary metal oxide semiconductors (CMOS)2. When the electronics are designed to operate at cryogenic temperatures, they can ultimately be integrated with the qubits on the same die or package, overcoming the ‘wiring bottleneck’3–6. Here we report a cryogenic CMOS control chip operating at 3 kelvin, which outputs tailored microwave bursts to drive silicon quantum bits cooled to 20 millikelvin. We first benchmark the control chip and find an electrical performance consistent with qubit operations of 99.99 per cent fidelity, assuming ideal qubits. Next, we use it to coherently control actual qubits encoded in the spin of single electrons confined in silicon quantum dots7–9 and find that the cryogenic control chip achieves the same fidelity as commercial instruments at room temperature. Furthermore, we demonstrate the capabilities of the control chip by programming a number of benchmarking protocols, as well as the Deutsch–Josza algorithm10, on a two-qubit quantum processor. These results open up the way towards a fully integrated, scalable silicon-based quantum computer.
Abstract Large-scale superconducting quantum computing systems entail high-fidelity control and readout of large numbers of qubits at millikelvin temperatures, resulting in a massive input-output bottleneck. Cryo-electronics, based on complementary metal-oxide-semiconductor (CMOS) technology, may offer a scalable and versatile solution to overcome this bottleneck. However, detrimental effects due to cross-coupling between the electronic and thermal noise generated during cryo-electronics operation and the qubits need to be avoided. Here we present an ultra-low power radio-frequency (RF) multiplexing cryo-electronics solution operating below 15 mK that allows for control and interfacing of superconducting qubits with minimal cross-coupling. We benchmark its performance by interfacing it with a superconducting qubit and observe that the qubit’s relaxation times (T1) are unaffected, while the coherence times (T2) are only minimally affected in both static and dynamic operation. Using the multiplexer, single qubit gate fidelities above 99.9%, i.e., well above the threshold for surface-code based quantum error-correction, can be achieved with appropriate thermal filtering. In addition, we demonstrate the capability of time-division-multiplexed qubit control by dynamically windowing calibrated qubit control pulses. Our results show that cryo-CMOS multiplexers could be used to significantly reduce the wiring resources for large-scale qubit device characterization, large-scale quantum processor control and quantum error correction protocols.