Various benchmarking metrics have been developed to quantify the performance of quantum computing hardware and help evaluate development. However, it is not always necessary to know the metric values precisely. This is especially true for potential end-users who may not be experts in the underlying technology itself. In this work, we show how to estimate the quantum volumetric metrics defined in Ref. [1] based on system parameters such as qubit number, qubit layout/connectivity, and physical error rates. As part of this work, we also include an initial analysis of how the overhead required for quantum error correction in systems below the error correction viability threshold affects the metric value of that system.
Various benchmarking metrics have been developed to quantify the performance of quantum computing hardware and help evaluate development. However, it is not always necessary to know the metric values precisely. This is especially true for potential end-users who may not be experts in the underlying technology itself. In this work, we show how to estimate the quantum volumetric metrics defined in Ref. [1] based on system parameters such as qubit number, qubit layout/connectivity, and physical error rates. As part of this work, we also include an initial analysis of how the overhead required for quantum error correction in systems below the error correction viability threshold affects the metric value of that system.
Quantum algorithms are often represented in terms of quantum circuits operating on ideal (logical) qubits. However, the practical implementation of these algorithms poses significant challenges. Many quantum algorithms require a substantial number of logical qubits, and the inherent susceptibility to errors of quantum computers require quantum error correction. The integration of error correction introduces overhead in terms of both space (physical qubits required) and runtime (how long the algorithm needs to be run for). This paper addresses the complexity of comparing classical and quantum algorithms, primarily stemming from the additional quantum error correction overhead. We propose a comprehensive framework that facilitates a direct and meaningful comparison between classical and quantum algorithms. By acknowledging and addressing the challenges introduced by quantum error correction, our framework aims to provide a clearer understanding of the comparative performance of classical and quantum computing approaches. This work contributes to understanding the practical viability and potential advantages of quantum algorithms in real-world applications. We apply our framework to quantum cryptanalysis, since it is well known that quantum algorithms can break factoring and discrete logarithm based cryptography and weaken symmetric cryptography and hash functions. In order to estimate the real-world impact of these attacks, apart from tracking the development of fault-tolerant quantum computers it is important to have an estimate of the resources needed to implement these quantum attacks. This analysis provides state-of-the art snap-shot estimates of the realistic costs of implementing quantum attacks on these important cryptographic algorithms, assuming quantum fault-tolerance is achieved using surface code methods, and spanning a range of potential error rates. These estimates serve as a guide for gauging the realistic impact of these algorithms and for benchmarking the impact of future advances in quantum algorithms, circuit synthesis and optimization, fault-tolerance methods and physical error rates.
Quantum computing has made considerable progress in recent years in both software and hardware. But to unlock the power of quantum computers in solving problems that cannot be efficiently solved classically, quantum computing at scale is necessary. Unfortunately, quantum simulators suffer from their exponential complexity and, at the same time, the currently available quantum computing hardware is still rather limited (even if roadmaps make intriguing promises). Hence, in order to evaluate quantum computing applications, end-users are still frequently restricted to toy-size problem instances (which additionally often do not take error correction into account). This substantially hinders the development and assessment of real-world quantum computing applications. In this work, we demonstrate how to utilize Resource Estimation to improve this situation. We show how the current workflow (relying on simulation and/or execution) can be complemented with an estimation step, allowing that end-users (1) actually can consider real-world problem instances already today (also considering error correction schemes and correspondingly required hardware resources), (2) can start exploring possible optimizations of those instances across the entire design space, and (3) can incorporate hypotheses of hardware development trends to derive more informed and, thus, better design space parameters. Overall, this enables end-users already today to check out the promises of possible future quantum computing applications, even if the corresponding hardware to execute them is not available yet.
Quantum computing has made considerable progress in recent years in both software and hardware. But to unlock the power of quantum computers in solving problems that cannot be efficiently solved classically, quantum computing at scale is necessary. Unfortunately, quantum simulators suffer from their exponential complexity and, at the same time, the currently available quantum computing hardware is still rather limited (even if roadmaps make intriguing promises). Hence, in order to evaluate quantum computing applications, end-users are still frequently restricted to toy-size problem instances (which additionally often do not take error correction into account). This substantially hinders the development and assessment of real-world quantum computing applications. In this work, we demonstrate how to utilize Resource Estimation to improve this situation. We show how the current workflow (relying on simulation and/or execution) can be complemented with an estimation step, allowing that end-users (1) actually can consider real-world problem instances already today (also considering error correction schemes and correspondingly required hardware resources), (2) can start exploring possible optimizations of those instances across the entire design space, and (3) can incorporate hypotheses of hardware development trends to derive more informed and, thus, better design space parameters. Overall, this enables end-users already today to check out the promises of possible future quantum computing applications, even if the corresponding hardware to execute them is not available yet.
Creating scalable, reliable, and well-motivated benchmarks for quantum computers is challenging: straightforward approaches to benchmarking suffer from exponential scaling, are insensitive to important errors, or use poorly-motivated performance metrics. Furthermore, curated benchmarking suites cannot include every interesting quantum circuit or algorithm, which necessitates a tool that enables the easy creation of new benchmarks. In this work, we introduce a software tool for creating scalable and reliable benchmarks that measure a well-motivated performance metric (process fidelity) from user-chosen quantum circuits and algorithms. Our software, called scarab, enables the creation of efficient and robust benchmarks even from circuits containing thousands or millions of qubits, by employing efficient fidelity estimation techniques, including mirror circuit fidelity estimation and subcircuit volumetric benchmarking. scarab provides a simple interface that enables the creation of reliable benchmarks by users who are not experts in the theory of quantum computer benchmarking or noise. We demonstrate the flexibility and power of scarab by using it to turn existing inefficient benchmarks into efficient benchmarks, to create benchmarks that interrogate hardware and algorithmic trade-offs in Hamiltonian simulation, to quantify the in-situ efficacy of approximate circuit compilation, and to create benchmarks that use subcircuits to measure progress towards executing a circuit of interest.
Accurately estimating the performance of quantum hardware is crucial for comparing different platforms and predicting the performance and feasibility of quantum algorithms and applications. In this paper, we tackle the problem of benchmarking a quantum register based on the NV center in diamond operating at room temperature. We define the connectivity map as well as single qubit performance. Thanks to an all-to-all connectivity the 2 and 3 qubit gates performance is promising and competitive among other platforms. We experimentally calibrate the error model for the register and use it to estimate the quantum volume, a metric used for quantifying the quantum computational capabilities of the register, of 8. Our results pave the way towards the unification of different architectures of quantum hardware and evaluation of the joint metrics.
Accurately estimating the performance of quantum hardware is crucial for comparing different platforms and predicting the performance and feasibility of quantum algorithms and applications. In this paper, we tackle the problem of benchmarking a quantum register based on the NV center in diamond operating at room temperature. We define the connectivity map as well as single-qubit performance. Thanks to an all-to-all connectivity, the 2 and 3-qubit gates performance is promising and competitive among other platforms. We experimentally calibrate the error model for the register and use it to estimate the quantum volume, a metric used for quantifying the quantum computational capabilities of the register, of 8. Our results pave the way towards the unification of different architectures of quantum hardware and the evaluation of the joint metrics.