Long, powerful soft detection forward error correction codes are typically constructed by concatenation of shorter component codes that are decoded through iterative Soft-Input Soft-Output (SISO) procedures. The current gold-standard is Low Density Parity Check (LDPC) codes, which are built from weak single parity check component codes that are capable of producing accurate SO. Due to the recent development of SISO decoders that produce highly accurate SO with codes that have multiple redundant bits, square product code constructions that can avail of more powerful component codes have been shown to be competitive with the LDPC codes in the 5G New Radio standard in terms of decoding performance while requiring fewer iterations to converge. Motivated by applications that require more powerful low-rate codes, in the present paper we explore the possibility of extending this design space by considering the construction and decoding of cubic tensor codes.
Long, powerful soft detection forward error correction codes are typically constructed by concatenation of shorter component codes that are decoded through iterative Soft-Input Soft-Output (SISO) procedures. The current gold-standard is Low Density Parity Check (LDPC) codes, which are built from weak single parity check component codes that are capable of producing accurate SO. Due to the recent development of SISO decoders that produce highly accurate SO with codes that have multiple redundant bits, square product code constructions that can avail of more powerful component codes have been shown to be competitive with the LDPC codes in the 5G New Radio standard in terms of decoding performance while requiring fewer iterations to converge. Motivated by applications that require more powerful low-rate codes, in the present paper we explore the possibility of extending this design space by considering the construction and decoding of cubic tensor codes.
We establish that a large, flexible class of long, high redundancy error correcting codes can be efficiently and accurately decoded with guessing random additive noise decoding (GRAND). Performance evaluation demonstrates that it is possible to construct simple product codes with lengths of approximately 200 to 4000 bits and rates between 0.2 and 0.8 that outperform low-density parity-check (LDPC) codes from the 5G New Radio standard in both AWGN and fading channels. The concatenated structure enables many desirable features, including: low-complexity hardware-friendly encoding and decoding; significant flexibility in length and rate through modularity; and high levels of parallelism in encoding and decoding that enable low latency. Central is the development of a method through which any soft-input (SI) GRAND algorithm can provide soft-output (SO) in the form of an accurate a-posteriori estimate of the likelihood that a decoding is correct or, in the case of list decoding, the likelihood that each element of the list is correct. The distinguishing feature of soft-output GRAND (SOGRAND) is the provision of an estimate that the correct decoding has not been found, even when providing a single decoding. Per-block SO can be converted into accurate per-bit SO by a weighted sum that includes a term for the SI. Implementing SOGRAND adds negligible computation and memory to the existing decoding process, and using it results in a practical, low-latency alternative to LDPC codes.
In this paper, we continue our investigation into the error-reducing properties of superposition codes started in Andreev, et al. (2023), where the focus was on Sparse Regression Codes (SPARCs) with Gaussian signals. However, despite their high performance, SPARCs are known to have noticeable limitations in their application due to their high decoding complexity. This prompted us to propose a Low-Density Parity Check (LDPC)-based superposition scheme with low-complexity Soft Successive Interference Cancellation (SIC) decoding. In this paper, we focus on such a scheme and perform a detailed analysis of it. We have developed a low-complexity quantized density evolution (DE) procedure for the proposed scheme under the SIC decoder to estimate the output bit error rate. It is shown that the obtained DE procedure quite accurately predicts the behavior of the considered LDPC-based superposition scheme. The procedure predicts not only the waterfall region, but also the error-floor region, which we assume to be caused by interference of component LDPC codes. This helps us to obtain highly optimized constructions of proto-graphs of LDPC code components and significantly improve the bit error rate performance of the whole construction. In addition, for the proposed scheme we have analyzed the output error count distribution, which is crucial for concatenated code constructions, where usually error-reducing codes are used as inner code. All numerical results and analysis are presented at the end of the paper.
Long forward error correction codes are typically constructed by concatenating shorter component codes that are then decoded through iterative Soft-Input Soft-Output (SISO) of their components. The recently introduced Soft Output Guessing Random Additive Noise Decoding (SOGRAND) has been shown to enable accurate SISO component decoding for a broad range of component codes. Here we establish that by specializing its SISO computation to Single Parity Check codes, SOGRAND offers an alternative existing Check Node (CN) update for decoding Low Density Parity Check codes. Simulation results demonstrate similar or better decoding performance than Gallager's sum-product algorithm and norm-min-sum, while offering two distinct low complexity, hardware friendly CN update algorithms.
The focus of this paper is directed towards the investigation of the characteristics of symbol-by-symbol iterative decoding algorithms for error-correcting block product-codes (block turbo-codes) which enable to reliable information transfer at relatively low received signal/noise and provide high power efficiency. Specific feature of investigated product codes is construction with usage of low-density parity-check codes (LDPC) and these code constructions are in the class of LDPC too. According to this fact the considered code constructions have symbol-by-symbol decoding algorithms developed for total class LDPC codes, namely BP (belief propagation) and its modification MIN_SUM_BP. The BP decoding algorithm is iterative and for implementation the signal/noise is required, for implementation of MIN_SUM_BP decoding algorithm the signal/noise is not required. The resulted characteristics of product codes constructed with usage of LDPC based on project geometry (length of code words, information volume, code rate, error performances) are presented in this paper. These component LDPC codes are cyclic and have encoding and decoding algorithms with low complexity implementation. The computer simulations for encoding and iterative symbol-by-symbol decoding algorithms for the number of turbo-codes with different code rate and information volumes are performed. The results of computer simulations have shown that MIN_SUM_BP decoding algorithm is more effective than BP decoding algorithm for channel with additive white gaussian noise concerning error-performances.
Concatenated codes are effectively used in different approaches of error-correcting theory. We suggest new concatenated code construction that is composed of outer LDPC code and a particular designed inner LDPC code. Special optimization procedure was developed to obtain inner code with specific error-correcting characteristics. We apply the decoder of woven codes to this construction, while reducing the complexity of decoding procedure compared to a classic decoder of LDPC code. Furthermore, we improve the performance of our scheme with puncturing the code symbols. The resulting concatenated construction outperforms low-rate LDPC from the 5G standard. Besides this, we demonstrate the performance of code with a special parity-check matrix consisting of parity-check matrices of inner and outer codes from our suggested construction.
In this work, iterative decoders for Low-Density Parity-Check (LDPC) codes are analyzed and optimized for low computational complexity. LDPC block codes are now widely used in industry standards such as Wi-Fi or 5G New Radio (NR). Hence, there is a strong need for decoder concepts suitable for hardware designs. In addition, terminated LDPC convolutional codes are promising candidates for next-generation communication systems. The main theme of this work is to investigate low-overhead strategies for reducing the computational complexity of iterative decoders. Two aspects are considered for fast decoding of the LDPC block codes in 5G NR. Firstly, an efficient but simple-to determine update schedule for the iterative decoding process, i.e., the sequence of updates on different parts of a codeword, is proposed. Secondly, Early Termination (ET), i.e., an option to stop decoding before a maximal number of iterations is exhausted, is improved in two ways: On the one hand, a partial evaluation of the code’s Parity-Check (PC) equations speeds up the detection of valid codewords. On the other hand, a novel criterion detects when the decoding process is unlikely to converge and stops the decoding before a lot of resources are wasted on futile iterations. The combination of all techniques results in a decoder with significant reduction of the computational complexity compared to a decoder without these methods. Still, only few additional residual decoding errors are produced. This work also contains an analysis of various aspects of a Windowed Decoder (WD), which is a specialized decoder design for LDPC convolutional codes. A WD can be configured in even more ways than a decoder for block codes. The analysis in this work assumes a normalization of the computational complexity to a certain maximal value. With this setup, it is shown that a larger size of the decoding window may be preferable over a smaller size to minimize the computational complexity. Furthermore, various window update strategies (determining in which way the code symbol reliabilities are updated in each window) and variations of ET are compared to identify a well-suited WD configuration. Lastly, strategies with Dynamic Scheduling (DS) are considered to further reduce the computational complexity. A novel fixed approach derived from several DS strategies performs well without actual dynamic knowledge of the decoder state. All in all, the optimized WD configuration halves the computational complexity of a block decoder while maintaining an acceptable loss in the decoding performance measured by the number of residual decoding errors. A comparison of systems with Hybrid Automatic Repeat reQuest (HARQ) expands the scope of this work into the domain of error control by retransmissions. The analyzed systems make use of the decoder output, e.g., the final code-symbol reliabilities, to assemble dynamic retransmissions that are as short as possible and contain specifically selected code symbols. These systems stand in contrast to contemporary implementations of HARQ that only use imprecise feedback messages. Still, some compatibility with existing systems is achieved by assuming a limited feedback channel, which requires clever compression of the feedback information. A novel HARQ system is proposed, which evaluates the code’s PC equations to avoid the computational overhead of soft-value processing. The throughput with the proposed system is found to be improved compared to a reference system that evaluates code-symbol reliabilities. Finally, approximations of the accurate message-update rules of the Sum–Product Algorithm (SPA) are analyzed. With fixed-point arithmetic, Look-Up Tables (LUTs) are a promising approach to approximate functions that are costly to compute. It is shown that an optimized LUT with just nine entries can be used in a fixed-point decoder such that the decoding performance is close to that of a floating-point decoder with accurate message updates.