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arXiv:2412.12874 · PRX Quantum

Near-Term Spin-Qubit Architecture Design via Multipartite Maximally Entangled States

Nikiforos Paraskevopoulos, Matthew Steinberg, Brennan Undseth, Aritra Sarkar, Lieven M. K. Vandersypen, Xiao Xue, Sebastian Feld

Published Apr 9, 2025• 8 citations
arXivHTMLPDF

Abstract

The design and benchmarking of quantum computer architectures traditionally rely on practical hardware restrictions, such as gate fidelities, control, and cooling. At the theoretical and software levels, numerous approaches have been proposed for benchmarking quantum devices, ranging from, , quantum volume to randomized benchmarking. In this work, we utilize the quantum information-theoretic properties of multipartite maximally entangled quantum states, in addition to their correspondence with quantum error-correction codes, permitting us to quantify the entanglement generated on near-term bilinear spin-qubit architectures. For this aim, we introduce four metrics that ascertain the quality of genuine multipartite quantum entanglement, along with circuit-level fidelity measures. As part of the task of executing a quantum circuit on a device, we devise simulations, which combine expected hardware characteristics of spin-qubit devices with appropriate compilation techniques; we then analyze three different architectural choices of varying lattice sizes for bilinear arrays, under three increasingly realistic noise models. We find that if the use of a compiler is assumed, sparsely connected spin-qubit lattices can approach comparable values of our metrics to those of the most highly connected device architecture. Even more surprisingly, by incorporating crosstalk into our last noise model, we find that, as error rates for crosstalk approach realistic values, the benefits of utilizing a bilinear array with advanced connectivity vanish. Our results highlight the limitations of adding local connectivity to near-term spin-qubit devices, and can be readily adapted to other qubit technologies. The framework developed here can be used for analyzing quantum entanglement on a device before fabrication, informing experimentalists on concomitant realistic expectations.

DOI
10.1103/prxquantum.6.020307

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The design and benchmarking of quantum computer architectures traditionally rely on practical hardware restrictions, such as gate fidelities, control, and cooling. At the theoretical and software levels, numerous approaches have been proposed for benchmarking quantum devices, ranging from, , quantum volume to randomized benchmarking. In this work, we utilize the quantum information-theoretic properties of multipartite maximally entangled quantum states, in addition to their correspondence with quantum error-correction codes, permitting us to quantify the entanglement generated on near-term bilinear spin-qubit architectures. For this aim, we introduce four metrics that ascertain the quality of genuine multipartite quantum entanglement, along with circuit-level fidelity measures. As part of the task of executing a quantum circuit on a device, we devise simulations, which combine expected hardware characteristics of spin-qubit devices with appropriate compilation techniques; we then analyze three different architectural choices of varying lattice sizes for bilinear arrays, under three increasingly realistic noise models. We find that if the use of a compiler is assumed, sparsely connected spin-qubit lattices can approach comparable values of our metrics to those of the most highly connected device architecture. Even more surprisingly, by incorporating crosstalk into our last noise model, we find that, as error rates for crosstalk approach realistic values, the benefits of utilizing a bilinear array with advanced connectivity vanish. Our results highlight the limitations of adding local connectivity to near-term spin-qubit devices, and can be readily adapted to other qubit technologies. The framework developed here can be used for analyzing quantum entanglement on a device before fabrication, informing experimentalists on concomitant realistic expectations.
Highly entangled quantum states are an ingredient in numerous applications in quantum computing. However, preparing these highly entangled quantum states on currently available quantum computers at high fidelity is limited by ubiquitous errors. Besides improving the underlying technology of a quantum computer, the scale and fidelity of these entangled states in near-term quantum computers can be improved by specialized compilation methods. In this work, the compilation of quantum circuits for the preparation of highly entangled architecture-specific graph states is addressed by defining and solving a formal model, i.e., a form of discrete constraint optimization. Our model incorporates information about gate cancellations, gate commutations, and accurate gate timing to determine an optimized graph state preparation circuit. Up to now, these aspects have only been considered independently of each other, typically applied to arbitrary quantum circuits. We quantify the quality of a generated state by performing stabilizer measurements and determining its fidelity. We show that our new method reduces the error when preparing a seven-qubit graph state by 3.5x on average compared to the state-of-the-art Qiskit solution. For a linear eight-qubit graph state, the error is reduced by 6.4x on average. The presented results highlight the ability of our approach to prepare higher fidelity or larger-scale graph states on gate-based quantum computing hardware.
Quantifying multipartite entanglement in quantum many-body systems and hybrid quantum computing architectures is a fundamental yet challenging task. In recent years, thermodynamic quantities such as the maximum extractable work from an isolated system (the ergotropy) have allowed for entanglement measures that are operationally more accessible. However, these measures can be restrictive when applied to systems governed by Hamiltonians with strong collective or interparticle interactions. Motivated by advances in quantum simulators, we propose a framework that circumvents these restrictions by evaluating global and local ergotropy either through controlled quenching of interactions or by measuring suitable local observables only. We show that this formalism allows us to correctly estimate genuine multipartite entanglement in both stationary and time-evolved states of systems with strong interactions, including parametrized quantum states simulated on a quantum circuit with varying circuit depth and noise. We demonstrate its applicability to realistic physical models, namely, the Tavis-Cummings model, the three-level Dicke model, and the transverse-field Ising model, highlighting its potential as a versatile tool for characterizing entanglement in near-term quantum simulators.
Quantum computers with a limited qubit connectivity require inserting SWAP gates for qubit routing, which increases gate execution errors and the impact of environmental noise due to an overhead in circuit depth. In this work, we benchmark various routing techniques considering random quantum circuits on one-dimensional and square lattice connectivities, employing both analytical and numerical methods. We introduce circuit fidelity as a comprehensive metric that captures the effects of SWAP and circuit depth overheads. Leveraging a novel approach based on the SABRE algorithm, we achieve up to 84%84\%84% higher average circuit fidelity for large devices within the NISQ range, compared to previously existing methods. Additionally, our results highlight that the optimal routing choice critically depends on the qubit count and the hardware characteristics, including gate fidelities and coherence times.
Abstract Quantum noise in real-world devices poses a significant challenge in achieving practical quantum advantage, since accurately compiled and executed circuits are typically deep and highly susceptible to decoherence. To facilitate the implementation of complex quantum algorithms on noisy hardware, we propose an approximate method for compiling target quantum circuits into brick-wall layouts. This new circuit design consists of two-qubit CNOT gates that can be directly implemented on real quantum computers, in conjunction with optimized one-qubit gates, to approximate the essential dynamics of the original circuit while significantly reducing its depth. Our approach is evaluated through numerical simulations of time-evolution circuits for the critical Ising model, quantum Fourier transformation, and Haar-random quantum circuits, as well as experiments on IBM quantum platforms. By accounting for compilation error and circuit noise, we demonstrate that time evolution and quantum Fourier transformation circuits achieve high compression rates, while random quantum circuits are less compressible. The degree of compression is related to the rate of entanglement accumulation in the target circuit. In particular, experiments on IBM platforms achieve a compression rate of 12.512.512.5 for N=12N=12N=12, significantly extending the application of current quantum devices. Furthermore, large-scale numerical simulations for system sizes up to N=30N=30N=30 reveal that the optimal depth dmaxd_{\rm max}dmax​ to achieve maximal overall fidelity is independent of system size NNN, suggesting the scalability of our method for large quantum devices in terms of quantum resources.
The development of quantum computers requires not only experimental advances, but also theoretical efforts to tackle the bottlenecks and identify potential applications. This thesis addresses some essential elements in each stage of the development of quantum computers, from the currently available hardware to the long-term devices. The critical factor that hinders the quantum hardware from performing perfect operations is the presence of noise, however, it can be overcome by error correction codes. We first consider a large-scale quantum processor with asymmetrical noise and preferably a modular structure. By concatenating the surface code with an error-detecting code, and utilising the information from detection with a customised decoder, we find very high thresholds for the designed devices. The second topic is small error correction codes which are more realistic to be implemented in the near future. A measure `integrity' is introduced to benchmark the performance of quantum memories to demonstrate beneficial error correction, associated with four milestones. We show integrity is closely related with other commonly-used measures and can be easily assessed by experimentalists. This framework is then studied in detail in the context of an ion-trap quantum device implemented with the seven qubit code. We present a protocol based on detailed sequences of crystal-reconfiguration operations and stabiliser mappings to perform a full error correction cycle. Realistic error models and parameters from reported works are also given. While experimental efforts continue to battle against the noise, some hybrid quantum-classical algorithms have been developed to be implemented on the near-term noisy devices. The variational algorithm is one of the hybrid algorithms that have been widely applied to simulations of condensed matter physics and quantum chemistry. In the next chapter, we introduce a variational quantum compiler to automatically search for the encoding circuits of small error correction codes. By tailoring the ansatz to optimise the circuit for particular hardware systems, we show some novel circuits discovered with the compiler. The final chapter applies the variational algorithm to solve linear algebra problems including linear systems of equations and matrix-vector multiplications. We show that the linear algebra problems can be solved with near-term devices, with circuit depth linear to the condition number and super-linear to the number of qubits.
As quantum technology advances and the size of quantum computers grow, it becomes increasingly important to understand the extent of quality in the devices. As large-scale entanglement is a quantum resource crucial for achieving quantum advantage, the challenge in its generation makes it a valuable benchmark for measuring the performance of universal quantum devices. In this paper, we study entanglement in Greenberger-Horne-Zeilinger (GHZ) and graph states prepared on the range of IBM Quantum devices. We generate GHZ states and investigate their coherence times with respect to state size and dynamical decoupling techniques. A GHZ fidelity of 0.519 ± 0.014 is measured on a 32-qubit GHZ state, certifying its genuine multipartite entanglement (GME). We show a substantial improvement in GHZ decoherence rates for a seven-qubit GHZ state after implementing dynamical decoupling, and observe a linear trend in the decoherence rate of α = ( 7.13 N + 5.54 ) × 10 − 3 µ s − 1 for up to N = 15 qubits, confirming the absence of superdecoherence. Additionally, we prepare and characterize fully bipartite entangled native-graph states on 22 superconducting quantum devices with qubit counts as high as 414 qubits, all active qubits of the 433-qubit IBM Osprey device. Analysis of the decay of two-qubit entanglement within the prepared states shows suppression of coherent noise signals with the implementation of dynamical decoupling techniques. Additionally, we observe that the entanglement in some qubit pairs oscillates over time, which is likely caused by residual ZZ-interactions. Characterizing entanglement in native-graph states, along with detecting entanglement oscillations, can be an effective approach to low-level device benchmarking that encapsulates two-qubit error rates along with additional sources of noise, with possible applications to quantum circuit compilation. We develop several tools to automate the preparation and entanglement characterization of GHZ and graph states. In particular, a method to characterize graph state bipartite entanglement using just 36 circuits, constant with respect to the number of qubits. Published by the American Physical Society 2024