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arXiv:2410.15590 · Nature

Industry-compatible silicon spin-qubit unit cells exceeding 99% fidelity

Paul Steinacker, Nard Dumoulin Stuyck, Wee Han Lim, Tuomo Tanttu, MengKe Feng, Santiago Serrano, Andreas Nickl, Marco Candido, Jesús D. Cifuentes, Ensar Vahapoglu, Samuel K Bartee, Fay E. Hudson, K. W. Chan, Stefan Kubicek, Julien Jussot, Yann Canvel, Sofie Beyne, Yosuke Shimura, Roger Loo, Clément Godfrin, Bart Raes, S. Baudot, Danny Wan, Arne Laucht, Chih Hwan Yang, André Saraiva, Christopher C. Escott, Kristiaan De Greve, Andrew S. Dzurak

Published Sep 24, 2025• 58 citations
arXivHTMLPDF

Abstract

Abstract Among the many types of qubit presently being investigated for a future quantum computer, silicon spin qubits with millions of qubits on a single chip are uniquely positioned to enable quantum computing. However, it has not been clear whether the outstanding high-fidelity operations and long coherence times shown by silicon spin qubits fabricated in academic settings 1–8 can be reliably reproduced when the qubits are manufactured in a semiconductor foundry 9–11 . Here we show precise qubit operation of silicon two-qubit devices made with standard semiconductor tooling in a 300-mm foundry environment. Of the key metrics, single- and two-qubit control fidelities exceed 99% for all four devices, and the state preparation and measurement fidelities reach up to 99.9%, as evidenced by gate set tomography. We report spin lifetime and coherence up to T 1 = 9.5 s, $${T}_{2}^{* }=40.6\,{\rm{\mu }}{\rm{s}}$$ T 2 * = 40.6 μ s and $${T}_{2}^{{\rm{Hahn}}}=1.9\,{\rm{ms}}$$ T 2 Hahn = 1.9 ms . We determine that residual nuclear spin-carrying isotopes contribute substantially to operational errors, identifying further isotopic purification as a clear pathway to even higher performance.

DOI
10.1038/s41586-025-09531-9

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Abstract Among the many types of qubit presently being investigated for a future quantum computer, silicon spin qubits with millions of qubits on a single chip are uniquely positioned to enable quantum computing. However, it has not been clear whether the outstanding high-fidelity operations and long coherence times shown by silicon spin qubits fabricated in academic settings 1–8 can be reliably reproduced when the qubits are manufactured in a semiconductor foundry 9–11 . Here we show precise qubit operation of silicon two-qubit devices made with standard semiconductor tooling in a 300-mm foundry environment. Of the key metrics, single- and two-qubit control fidelities exceed 99% for all four devices, and the state preparation and measurement fidelities reach up to 99.9%, as evidenced by gate set tomography. We report spin lifetime and coherence up to T 1 = 9.5 s, T2∗=40.6 μs{T}_{2}^{* }=40.6\,{\rm{\mu }}{\rm{s}}T2∗​=40.6μs T 2 * = 40.6 μ s and T2Hahn=1.9 ms{T}_{2}^{{\rm{Hahn}}}=1.9\,{\rm{ms}}T2Hahn​=1.9ms T 2 Hahn = 1.9 ms . We determine that residual nuclear spin-carrying isotopes contribute substantially to operational errors, identifying further isotopic purification as a clear pathway to even higher performance.
Silicon spin qubits are a promising platform for quantum computing due to their high coherence, controllability, and CMOS manufacturability, yet scalable implementations have so far been limited to a few qubits. Here, to take a step towards larger qubit systems, we tune and coherently control an eight-dot linear array of silicon spin qubits fabricated in a 300~mm CMOS-compatible foundry process, establishing operational scalability beyond the two-qubit regime. All eight qubits are successfully tuned and characterized as four double-dot pairs, exhibiting Ramsey dephasing times T2∗T_2^*T2∗​ up to 41(2) μ~μ μs and Hahn-echo coherence times T2HahnT_2^{\mathrm{Hahn}}T2Hahn​ up to 1.31(4) ~ ms. Readout of the central four qubits is achieved via a cascaded charge-sensing protocol, enabling high-fidelity measurements of the entire multi-qubit array in a two step process. Additionally, we demonstrate a two-qubit gate operation between adjacent qubits with low phase noise. We show that silicon spin qubit arrays can be scaled to medium-sized arrays of 8 qubits while maintaining system coherence.
Silicon-based spin qubits have emerged as a promising platform for scalable quantum computation due to their compatibility with advanced semiconductor fabrication and integration with classical CMOS electronics. As fabrication capabilities advance toward larger, higher-yield devices, the field is transitioning from academic prototypes toward processors ultimately requiring millions of qubits. This shift places increasing emphasis on developing operating techniques that scale with qubit number. In this thesis, a four qubit SiMOS processor is used to investigate three key aspects of multi-qubit operation for spin-based quantum computing. First, tuning and operation techniques for parallel double-quantum-dot unit cells are developed. Electron loading strategies enable four-qubit operation in an isolated charge configuration, and universal single- and two-qubit control is demonstrated. The native gate set is characterised using gate set tomography. The processor is operated as two unit cells that can be initialised and read out in parallel, providing two independent parity measurements per shot, without increasing operation time or degrading state preparation and measurement fidelity. Second, control techniques for generating multi-qubit entangled states and executing general quantum circuits are established. Three-qubit maximally entangled states, including cluster and Greenberger–Horne–Zeilinger states, are generated and measured with a maximum fidelity of 82.5%. A Mermin value of 3.14 is achieved, certifying genuine tripartite entanglement. A fully symmetric dynamically decoupled gate sequence is developed, extending the entanglement lifetime beyond T2* to a limit set by T2-Hahn. A workflow for compiling, executing, and analysing arbitrary circuits from OpenQASM is also demonstrated. Finally, the first mid-circuit measurements in a silicon spin-qubit system are presented. This capability is extended to feedforward control, including a novel “in-layer” method that performs conditional phase operations without routing information to the classical control layer. This approach leverages measurement-induced backaction as a control mechanism. Both in-layer and FPGA-enabled feedforward strategies are benchmarked, and their dominant error channels are identified.
Abstract Universal quantum computation will require qubit technology based on a scalable platform1, together with quantum error correction protocols that place strict limits on the maximum infidelities for one- and two-qubit gate operations2, 3. Although various qubit systems have shown high fidelities at the one-qubit level4–10, the only solid-state qubits manufactured using standard lithographic techniques that have demonstrated two-qubit fidelities near the fault-tolerance threshold6 have been in superconductor systems. Silicon-based quantum dot qubits are also amenable to large-scale fabrication and can achieve high single-qubit gate fidelities (exceeding 99.9 per cent) using isotopically enriched silicon11, 12. Two-qubit gates have now been demonstrated in a number of systems13–15, but as yet an accurate assessment of their fidelities using Clifford-based randomized benchmarking, which uses sequences of randomly chosen gates to measure the error, has not been achieved. Here, for qubits encoded on the electron spin states of gate-defined quantum dots, we demonstrate Bell state tomography with fidelities ranging from 80 to 89 per cent, and two-qubit randomized benchmarking with an average Clifford gate fidelity of 94.7 per cent and an average controlled-rotation fidelity of 98 per cent. These fidelities are found to be limited by the relatively long gate times used here compared with the decoherence times of the qubits. Silicon qubit designs employing fast gate operations with high Rabi frequencies16, 17, together with advanced pulsing techniques18, should therefore enable much higher fidelities in the near future.
Silicon spin qubits are a leading candidate for large-scale quantum computing owing to their compatibility with semiconductor manufacturing. However, scaling to useful fault-tolerant processors will likely generate thermal loads that exceed the cooling power available at millikelvin temperatures. Raising the operating temperature eases cooling requirements but reduces gate fidelity, increasing the overhead of quantum error correction. Identifying the operating temperature that minimizes total power consumption is therefore a key challenge for commercially viable quantum computers. Here, we use gate set tomography to benchmark two-qubit silicon chips fabricated in both industrial and academic environments over a range of temperatures. Elevated temperatures substantially shorten coherence times and increase gate and state-preparation-and-measurement infidelities. Based on these measurements, we develop a general power model for silicon quantum computers that combines cryogenic cooling requirements with error-correction overheads. We show that a finite optimal operating temperature exists and is strongly influenced by a crossover temperature near 1 K in current devices, above which gate fidelity degrades rapidly. These results connect device-level fidelity limitations to system-level power requirements, providing design guidelines for large-scale silicon quantum computers.
Abstract : As classical computers begin to reach their fundamental performance limits, quantum computers will be an invaluable tool for the advance of science and technology. The trillion dollar silicon electronics industry sets the perfect stage for the evolution of quantum computation, yet it has so far proved to be a tough challenge to implement all the elements needed to build a scalable quantum computer in silicon. This thesis presents the first experimental demonstration of the full operation of single-spin qubits in Si. Our qubits consist of the electron and nuclear spins of a single phosphorus atom, implanted in a Si substrate, and controlled by a gated nanostructure. We describe an experimental setup tailored to minimise electron temperature and perform realtime data acquisition, analysis and instrument control. We present modeling, simulation and characterisation of a novel nanoscale coplanar antenna for spin control, designed to work at frequencies up to 50 GHz. These tools have allowed us to demonstrate the first ever single-atom spin-qubits in natural silicon, leading the way to demonstrating record qubit performances in isotopically purified 28Si: an electron spin qubit with measurement and control fidelities 97% and coherence times of 0.5 seconds; and a nuclear spin qubit with fidelities 99.99% and a record single-spin coherence of 30 s. We have performed noise spectroscopy in our system and concluded that decoherence is currently limited by magnetic noise originating from our broadband antenna.
Silicon spin qubits satisfy the necessary criteria for quantum information processing. However, a demonstration of high-fidelity state preparation and readout combined with high-fidelity single- and two-qubit gates, all of which must be present for quantum error correction, has been lacking. We use a two-qubit Si/SiGe quantum processor to demonstrate state preparation and readout with fidelity greater than 97%, combined with both single- and two-qubit control fidelities exceeding 99%. The operation of the quantum processor is quantitatively characterized using gate set tomography and randomized benchmarking. Our results highlight the potential of silicon spin qubits to become a dominant technology in the development of intermediate-scale quantum processors.