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arXiv:2409.07600

Long distance spin shuttling enabled by few-parameter velocity optimization

Alessandro David, Akshay Menon Pazhedath, Lars R. Schreiber, Tommaso Calarco, Hendrik Bluhm, Felix Motzoi

Published Jan 1, 2024• 0 citations
arXivHTMLPDF

Abstract

Spin qubit shuttling via moving conveyor-mode quantum dots in Si/SiGe offers a promising route to scalable miniaturized quantum computing. Recent modeling of dephasing via valley degrees of freedom and well disorder dictate a slow shutting speed which seems to limit errors to above correction thresholds if not mitigated. We increase the precision of this prediction, showing that typical errors for 10 $μ$m shuttling at constant speed results in O(1) error, using fast, automatically differentiable numerics and including improved disorder modeling and potential noise ranges. However, remarkably, we show that these errors can be brought to well below fault-tolerant thresholds using trajectory shaping with very simple parametrization with as few as 4 Fourier components, well within the means for experimental in-situ realization, and without the need for targeting or knowing the location of valley near degeneracies.

DOI
10.34734/fzj-2025-02062

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Abstract Small spin-qubit registers defined by single electrons confined in Si/SiGe quantum dots operate successfully and connecting these would permit scalable quantum computation. Shuttling the qubit carrying electrons between registers is a natural choice for high-fidelity coherent links provided the overhead of control signals stays moderate. Our proof-of-principle demonstrates shuttling of a single electron by a propagating wave-potential in an electrostatically defined 420 nm long Si/SiGe quantum-channel. This conveyor-mode shuttling approach requires independent from its length only four sinusoidal control signals. We discuss the tuning of the signal parameters, detect the smoothness of the electron motion enabling the mapping of potential disorder and observe a high single-electron shuttling fidelity of 99.42 ± 0.02% including a reversal of direction. Our shuttling device can be readily embedded in industrial fabrication of Si/SiGe qubit chips and paves the way to solving the signal-fanout problem for a fully scalable semiconductor quantum-computing architecture.

arXiv:2108.00879•npj Quantum Information•Aug 30, 2022•96 citations
Spin qubit shuttling via moving conveyor-mode quantum dots in Si/SiGe offers a promising route to scalable miniaturized quantum computing. Recent modeling of dephasing via valley degrees of freedom and well disorder dictate a slow shutting speed which seems to limit errors to above correction thresholds if not mitigated. We increase the precision of this prediction, showing that typical errors for 10 μμμm shuttling at constant speed results in O(1) error, using fast, automatically differentiable numerics and including improved disorder modeling and potential noise ranges. However, remarkably, we show that these errors can be brought to well below fault-tolerant thresholds using trajectory shaping with very simple parametrization with as few as 4 Fourier components, well within the means for experimental in-situ realization, and without the need for targeting or knowing the location of valley near degeneracies.
Coherent electron shuttling is a key requirement for realizing scalable silicon quantum computing architectures. However, in silicon qubits, the existence of nearly degenerate conduction-band valleys poses a significant challenge because non-adiabatic transitions to excited valley states cause spin dephasing via spin-valley mixing. In this paper, we propose a smooth velocity shuttling protocol to suppress these valley excitations. By mapping the time-domain design of the shuttling velocity profile onto the design problem of window functions in signal processing, we establish an analytical and intuitive design guideline that does not require computationally expensive numerical optimization. We demonstrate that the high-frequency sidelobes of the shuttling velocity spectrum can be effectively suppressed by applying a frequency-modulated gate voltage based on the Tukey window. Through statistical numerical simulations incorporating realistic spatial randomness of the valley landscape, we show that the proposed smooth velocity control significantly reduces the average spin infidelity in the moderate-to-low disorder regime (∣Δ0∣/σΔ≃O(1)|Δ_0|/σ_Δ\simeq \mathcal{O}(1)∣Δ0​∣/σΔ​≃O(1)). Our results underscore that this simple, control-level velocity shaping provides a robust pathway toward high-fidelity spin transport in large-scale silicon quantum processors.
Electron shuttling is emerging as a key mechanism for enabling long-range coupling in scalable spin-qubit architectures. Bringing shuttling waveform generation into the cryostat can improve scalability, but imposes strict area and power constraints on the control electronics. Concurrently, shuttling in Si/SiGe is further limited by a spatially varying valley splitting that induces spin--valley mixing and degrades coherence. Here, we make three contributions that address these limitations jointly: (i) an end-to-end co-simulation framework that combines disorder-informed valley maps with transistor-level cryogenic circuit simulations including electronic noise; (ii) a fully integrated cryogenic shuttling-signal generator tailored to velocity modulation, enabling period-wise waveform shaping through discrete circuit settings stored in on-chip memory; and (iii) a noise-aware optimization procedure that tunes only these implementable circuit controls, using one of four discrete resistor settings per period, to generate high-fidelity shuttling sequences. Across simulated valley and noise realizations in our co-simulation framework, the optimized velocity-modulation waveforms improve transport performance, achieving an average shuttling fidelity of 99.99±0.007%99.99 \pm 0.007\%99.99±0.007% at vavg=20 m s−1v_{\mathrm{avg}} = 20~\mathrm{m\,s^{-1}}vavg​=20 ms−1 over a distance of 10 μm10~μ\mathrm{m}10 μm, while maintaining active analog power consumption in the tens of μWμ\mathrm{W}μW during shuttling. This validates on-chip storage and replay of optimized control settings as a practical strategy to mitigate valley disorder in scalable shuttling architectures.
Valley excitations are considered one of the biggest challenges for a coherent spin shuttling in Si/SiGe heterostructures. In this work we theoretically investigate the valley dynamics during spin shuttling in a Si/SiGe heterostructure by considering a two-level system given by the two low-lying valley states of the mobile quantum dot. We assume that the electron is initially in the valley ground state and analyze the evolution of this state during shuttling. We find that, depending on the shuttling velocity, the system can be in three distinct regimes. In one of these regimes, the quantum information is preserved even in the presence of the valley excitations, allowing for coherent spin shuttling independently of the shuttling distance. This regime is obtained for a shuttling velocity of tens of m/s, a desired regime where dephasing mechanisms, such as spin-valley hotspots and spatially varying spin splitting, can be suppressed. This result is in accordance with recent experimental work that obtained a high spin shuttling fidelity after a fast and long shuttling. We also propose strategies based on the Partial Landau-Zener model to enhance the valley shuttling fidelity, which was found to be much more efficient than previously proposed strategies based on the standard Landau-Zener model.
Conveyor-mode shuttling in gated Si/SiGe devices enables adiabatic transfer of single electrons, electron patterns and spin qubits confined in quantum dots across several microns with a scalable number of signal lines. To realize their full potential, linear shuttle lanes must connect into a two-dimensional grid with controllable routing. We introduce a T-junction device linking two independently driven shuttle lanes. Electron routing across the junction requires no extra control lines beyond the four channels per conveyor belt. We measure an inter-lane charge transfer fidelity of F=100.0000000−9×10−7+0 %F = 100.0000000^{+0}_{-9\times 10^{-7}}\,\%F=100.0000000−9×10−7+0​% at an instantaneous electron velocity of 270 mm s−1270\,\mathrm{mm}\,\mathrm{s}^{-1}270mms−1. The filling of 54 quantum dots is controlled by simple atomic pulses, allowing us to swap electron patterns, laying the groundwork for a native spin-qubit SWAP gate. This T-junction establishes a path towards scalable, two-dimensional quantum computing architectures with flexible spin qubit routing for quantum error correction.
Mobile spin qubit architectures promise flexible connectivity for efficient quantum error correction and relaxed device layout constraints, but their viability rests on preserving spin coherence during transport. While shuttling transforms spatial disorder into time-dependent noise, its net impact on spin coherence remains an open question. Here we demonstrate systematic noise mitigation during spin shuttling in a linear 28^{28}28Si/SiGe quantum dot device. First, by passively reducing magnetic field gradients, we minimize charge-noise coupling to the spin and double the spatially averaged dephasing time T2∗(xn)T_2^*(x_n)T2∗​(xn​) from 4.44.44.4 to 8.5 μs8.5\,μ\text{s}8.5μs. Next, we exploit motional narrowing by periodically shuttling the qubit, achieving a further enhancement in coherence time up to T2∗,sh=11.5 μsT_{2}^{*,sh} = 11.5\,μ\text{s}T2∗,sh​=11.5μs. Finally, we incorporate dynamical decoupling techniques while periodically shuttling over distances exceeding 200 nm200\,\text{nm}200nm, reaching T2H,sh=32 μsT_\text{2}^{H,sh}= 32\,μ\text{s}T2H,sh​=32μs. For the same setup, we demonstrate that dressed-state shuttling provides robust protection against low-frequency noise with a decay time TRsh=21 μsT_R^{\text{sh}} = 21\,μ\text{s}TRsh​=21μs, without the overhead of pulsed control and allowing protection during one-way spin transport. By preserving coherence over timescales exceeding typical gate and readout operations, the demonstrated strategies establish mobile spin qubits as a viable solution for scalable silicon quantum processors.
Abstract Small spin-qubit registers defined by single electrons confined in Si/SiGe quantum dots operate successfully and connecting these would permit scalable quantum computation. Shuttling the qubit carrying electrons between registers is a natural choice for high-fidelity coherent links provided the overhead of control signals stays moderate. Our proof-of-principle demonstrates shuttling of a single electron by a propagating wave-potential in an electrostatically defined 420 nm long Si/SiGe quantum-channel. This conveyor-mode shuttling approach requires independent from its length only four sinusoidal control signals. We discuss the tuning of the signal parameters, detect the smoothness of the electron motion enabling the mapping of potential disorder and observe a high single-electron shuttling fidelity of 99.42 ± 0.02% including a reversal of direction. Our shuttling device can be readily embedded in industrial fabrication of Si/SiGe qubit chips and paves the way to solving the signal-fanout problem for a fully scalable semiconductor quantum-computing architecture.