Linear-Optical Quantum Computation with Arbitrary Error-Correcting Codes
Blayney W. Walshe, Ben Q. Baragiola, Hugo Ferretti, José Gefaell, Michael Vasmer, R. Weil, Takaya Matsuura, Thomas Jaeken, Giacomo Pantaleoni, Zhihua Han, Timo Hillmann, Nicolas C. Menicucci, Ilan Tzitrin, Rafael N. Alexander
High-rate quantum error-correcting codes mitigate the imposing scale of fault-tolerant quantum computers but require efficient generation of nonlocal, many-body entanglement. We provide a linear-optical architecture with these properties, compatible with arbitrary codes and Gottesman-Kitaev-Preskill qubits on generic lattices, and featuring a natural way to leverage physical noise bias. Simulations of hyperbolic surface codes and bivariate bicycle codes, promising families of quantum low-density parity-check codes, reveal a threshold comparable to the 2D surface code with substantially better encoding rates.
High-rate quantum error-correcting codes mitigate the imposing scale of fault-tolerant quantum computers but require efficient generation of nonlocal, many-body entanglement. We provide a linear-optical architecture with these properties, compatible with arbitrary codes and Gottesman-Kitaev-Preskill qubits on generic lattices, and featuring a natural way to leverage physical noise bias. Simulations of hyperbolic surface codes and bivariate bicycle codes, promising families of quantum low-density parity-check codes, reveal a threshold comparable to the 2D surface code with substantially better encoding rates.
Identifying the best families of quantum error correction (QEC) codes for near-term experiments is key to enabling fault-tolerant quantum computing. Ideally, such codes should have low overhead in qubit number, high physical error thresholds, and moderate requirements on qubit connectivity to simplify experiments, while allowing for high logical error suppression. Quantum low-density parity-check (LDPC) codes have been recently shown to provide a path towards QEC with low qubit overhead and small logical error probabilities. Here, we demonstrate that when the dominant errors are erasures, as can be engineered in different quantum computing architectures, quantum LDPC codes additionally provide high thresholds and even stronger logical error suppression in parameter regimes that are accessible to current experiments. Using large-scale QEC numerical simulations, we benchmark the performance of two families of high-rate quantum LDPC codes, namely the so-called Clifford-deformed La-cross codes and the bivariate bicycle codes, under a noise model strongly biased towards erasure errors. Both codes outperform the surface code by offering up to orders of magnitude lower logical error probabilities. Interestingly, we find that this decrease in the logical error probability may not be accompanied by an increase in the code threshold, as different QEC codes benefit differently from large erasure fractions. While here we focus on neutral atom qubits, the results also hold for other quantum platforms, such as trapped ions and superconducting qubits, for which erasure conversion has been demonstrated.
Suppressing errors is the central challenge for useful large-scale quantum computing. While quantum error correction promises a viable solution to this challenge, existing codes typically suffer from trade-offs among encoding efficiency, error threshold, and hardware feasibility. Here, we introduce Cornucopia codes, a family of practical, hardware-efficient quantum low-density parity-check codes that achieve an ultra-high encoding rate exceeding 1/2 while maintaining a pseudo-threshold exceeding 0.4% under the standard circuit-level noise model. Inspired by recent affine-permutation-based code constructions and the long-range connectivity available in reconfigurable neutral-atom arrays, we adopt a structured code geometry in which the code layout, atom rearrangement, and syndrome-extraction schedule are co-designed. This structure enables nonlocal syndrome measurements through simple, parallel atom rearrangements. A complete syndrome extraction cycle measures all X- and Z-type checks in parallel with 12 entangling layers, independent of the code size. The resulting threshold is comparable to those of the surface code and bivariate bicycle codes. In particular, a single code block [[2844,1426,18]] encodes 1,426 distance-18 logical qubits, achieving an extrapolated logical error rate of 2.6×10−16 (1.9×10−31) per logical qubit per cycle, assuming the physical error rate of 0.1% (0.01%). By comparison, a bivariate bicycle code implementation would require more than 68,000 physical qubits to encode the same number of logical qubits at a comparable logical error rate. These results bring demonstrations of ultra-low-overhead quantum error correction within the reach of near-term quantum processors.
Quantum low-density parity-check (qLDPC) codes are promising candidates for realizing large-scale fault-tolerant quantum computing. Although many codes with favorable theoretical parameters have been developed, their practical adoption must take hardware implementability into account. For mainstream quantum platforms such as superconductors and neutral atoms, the connectivity, the length of non-local couplings, and the complexity of wiring or atom rearrangement are key factors that dictate the difficulty of hardware realization. Here, we propose a new family of qLDPC codes, termed routing codes. Within this family, we find explicit instances whose encoding rates are competitive to those of bivariate bicycle (BB) codes, while systematically reducing qubit connectivity, shortening the length of non-local couplings, and, crucially, making all non-local couplings mutually parallel. This parallelism translates into quantifiable benefits, substantially reducing wiring crossings in superconducting multi-layer architectures and simplifying the scheduling of atom movement in neutral-atom arrays. The weight-7 routing codes maintain a high threshold of 0.7\% and reduce the physical qubit overhead by approximately a factor of 8, compared to surface codes achieving a same logical error rate. Further increasing the weight to 11 yields a [[200, 24, 14]] and [[200, 16, 17]] codes with an encoding rate over 23 times that of the surface code, at the cost of a higher logical error rate. These results establish routing codes as a hardware-centric qLDPC family that bridges the gap between theoretical optimality and near-term physical feasibility.
A central goal in quantum error correction is to reduce the overhead of fault-tolerant quantum computing by increasing noise thresholds and reducing the number of physical qubits required to sustain a logical qubit. We introduce a potential path towards this goal based on a family of dynamically generated quantum error correcting codes that we call "hyperbolic Floquet codes.'' These codes are defined by a specific sequence of non-commuting two-body measurements arranged periodically in time that stabilize a topological code on a hyperbolic manifold with negative curvature. We focus on a family of lattices for n qubits that, according to our prescription that defines the code, provably achieve a finite encoding rate ( 1 / 8 + 2 / n ) while still requiring only two-body measurements. Similar to hyperbolic surface codes, the distance of the code at each time-step scales at most logarithmically in n . The family of lattices we choose indicates that this scaling is achievable in practice. We develop and benchmark an efficient matching-based decoder that provides evidence of a threshold near 0.1% in a phenomenological noise model and 0.25% in an entangling measurements noise model. Utilizing weight-two check operators and a qubit connectivity of 3, one of our hyperbolic Floquet codes uses 400 physical qubits to encode 52 logical qubits with a code distance of 8, i.e., it is a [ [ 400 , 52 , 8 ] ] code. At small error rates, comparable logical error suppression to this code requires 5x as many physical qubits (1924) when using the honeycomb Floquet code with the same noise model and decoder.
Realizing practical quantum computers requires quantum error correction, but the most widely implemented approach, the planar surface code, demands a substantial physical qubit overhead. Here, we demonstrate that partitioning quantum processors into manageable, flat modules with non-local inter-module connections provides a natural solution. By wiring sparse, static boundary connections between Euclidean planar modules, we construct modular hyperbolic surface and color codes, based on new families of semi-hyperbolic codes. Using modular syndrome extraction circuits and efficient neural network and matching decoders, our circuit-level simulations show that this modular memory design can reduce the physical qubit overhead by tenfold or more compared to the surface code, even under elevated inter-module seam error rates. Projecting to larger system sizes, we find modular codes with encoding rate k/n=1/16 and distance d≥22, exceeding both the rate and distance of the [[288,12,18]] two-gross bivariate bicycle code while using mostly nearest-neighbor gates within planar modules, and implying an over 30× overhead reduction relative to surface codes. We develop fault-tolerant walking circuits for implementing logic via code automorphisms, which we co-design with low-weight, highly symmetrical logical bases and a modular extractor system that is ≈4.5× smaller than the code itself. Combining these methods, our modular memory can be used as dense storage in a universal fault-tolerant architecture, unlocking the efficiency of high-rate codes without sacrificing the fabrication advantages of planar modules.
Quantum computers are far more error-prone than their classical counterparts. Therefore, to build a quantum computer capable of running large-scale quantum algorithms, we must use the techniques of quantum error correction to ensure that the computer produces the correct output even when its components are unreliable. However, the resource requirements of building such a fault-tolerant quantum computer are currently prohibitive. Here, we examine the utility of using three-dimensional (3D) surface codes in a fault-tolerant quantum computer. This family of topological error-correcting codes is a generalization of the well-known 2D surface code to three spatial dimensions. We show that certain 3D surface codes have a transversal logical non-Clifford gate. In a quantum computing architecture, a non-Clifford gate is required to achieve computational universality. Transversal gates do not entangle qubits in different codes, so they are naturally fault tolerant because they do not spread errors. Next, we consider the problem of decoding 3D surface codes. In a quantum error-correcting code, we cannot observe the qubits directly, so we measure parity-check operators to gain information about the state of the code. Decoding is the problem of estimating what error has occurred given a list of unsatisfied parity checks. We observe that 3D surface codes offer asymmetric protection against bit-flip and phase-flip errors, but in both cases, we find that a threshold error rate exists below which we can suppress logical errors by increasing the size of the code. We use our results about logical gates and decoding to propose two fault-tolerant quantum computing architectures that utilize 3D surface codes. Finally, we compare the resource requirements of our architectures with the requirements of leading quantum computing architectures based on topological codes. We find that one of our architectures may be competitive with the leading architectures, depending on the properties of the physical systems used to build the qubits.