Identifying the best families of quantum error correction (QEC) codes for near-term experiments is key to enabling fault-tolerant quantum computing. Ideally, such codes should have low overhead in qubit number, high physical error thresholds, and moderate requirements on qubit connectivity to simplify experiments, while allowing for high logical error suppression. Quantum low-density parity-check (LDPC) codes have been recently shown to provide a path towards QEC with low qubit overhead and small logical error probabilities. Here, we demonstrate that when the dominant errors are erasures, as can be engineered in different quantum computing architectures, quantum LDPC codes additionally provide high thresholds and even stronger logical error suppression in parameter regimes that are accessible to current experiments. Using large-scale QEC numerical simulations, we benchmark the performance of two families of high-rate quantum LDPC codes, namely the so-called Clifford-deformed La-cross codes and the bivariate bicycle codes, under a noise model strongly biased towards erasure errors. Both codes outperform the surface code by offering up to orders of magnitude lower logical error probabilities. Interestingly, we find that this decrease in the logical error probability may not be accompanied by an increase in the code threshold, as different QEC codes benefit differently from large erasure fractions. While here we focus on neutral atom qubits, the results also hold for other quantum platforms, such as trapped ions and superconducting qubits, for which erasure conversion has been demonstrated.
Identifying the best families of quantum error correction (QEC) codes for near-term experiments is key to enabling fault-tolerant quantum computing. Ideally, such codes should have low overhead in qubit number, high physical error thresholds, and moderate requirements on qubit connectivity to simplify experiments, while allowing for high logical error suppression. Quantum low-density parity-check (LDPC) codes have been recently shown to provide a path towards QEC with low qubit overhead and small logical error probabilities. Here, we demonstrate that when the dominant errors are erasures, as can be engineered in different quantum computing architectures, quantum LDPC codes additionally provide high thresholds and even stronger logical error suppression in parameter regimes that are accessible to current experiments. Using large-scale QEC numerical simulations, we benchmark the performance of two families of high-rate quantum LDPC codes, namely the so-called Clifford-deformed La-cross codes and the bivariate bicycle codes, under a noise model strongly biased towards erasure errors. Both codes outperform the surface code by offering up to orders of magnitude lower logical error probabilities. Interestingly, we find that this decrease in the logical error probability may not be accompanied by an increase in the code threshold, as different QEC codes benefit differently from large erasure fractions. While here we focus on neutral atom qubits, the results also hold for other quantum platforms, such as trapped ions and superconducting qubits, for which erasure conversion has been demonstrated.
Quantum low-density parity-check (qLDPC) codes are promising candidates for realizing large-scale fault-tolerant quantum computing. Although many codes with favorable theoretical parameters have been developed, their practical adoption must take hardware implementability into account. For mainstream quantum platforms such as superconductors and neutral atoms, the connectivity, the length of non-local couplings, and the complexity of wiring or atom rearrangement are key factors that dictate the difficulty of hardware realization. Here, we propose a new family of qLDPC codes, termed routing codes. Within this family, we find explicit instances whose encoding rates are competitive to those of bivariate bicycle (BB) codes, while systematically reducing qubit connectivity, shortening the length of non-local couplings, and, crucially, making all non-local couplings mutually parallel. This parallelism translates into quantifiable benefits, substantially reducing wiring crossings in superconducting multi-layer architectures and simplifying the scheduling of atom movement in neutral-atom arrays. The weight-7 routing codes maintain a high threshold of 0.7\% and reduce the physical qubit overhead by approximately a factor of 8, compared to surface codes achieving a same logical error rate. Further increasing the weight to 11 yields a [[200, 24, 14]] and [[200, 16, 17]] codes with an encoding rate over 23 times that of the surface code, at the cost of a higher logical error rate. These results establish routing codes as a hardware-centric qLDPC family that bridges the gap between theoretical optimality and near-term physical feasibility.
High-rate quantum error correcting (QEC) codes with moderate overheads in qubit number and control complexity are highly desirable for achieving fault-tolerant quantum computing. Recently, quantum error correction has experienced significant progress both in code development and experimental realizations, with neutral atom qubit architecture rapidly establishing itself as a leading platform in the field. Scalable quantum computing will require processing with QEC codes that have low qubit overhead and large error suppression, and while such codes do exist, they involve a degree of non-locality that has yet to be integrated into experimental platforms. In this work, we analyze a family of high-rate Low-Density Parity-Check (LDPC) codes with limited long-range interactions and outline a near-term implementation in neutral atom registers. By means of circuit-level simulations, we find that these codes outperform surface codes in all respects when the two-qubit nearest neighbour gate error probability is below ~ 0.1%. By using multiple laser colors, we show how these codes can be natively integrated in two-dimensional static neutral atom qubit architectures with open boundaries, where the desired long-range connectivity can be targeted via the Rydberg blockade interaction. Quantum error correction codes with low qubit overhead and error suppression capabilities are highly desirable for fault-tolerant quantum computing. Here, the authors introduce a family of high-rate Low Density Parity-Check quantum error correcting codes with moderate long-range connectivity and outline a near-term implementation in static neutral atom registers.
Erasure qubits reduce overhead in fault-tolerant quantum error correction (QEC) by converting dominant faults into detectable errors known as erasures. They have demonstrated notable improvements in thresholds and scaling in surface and Floquet code memories. In this work, we use erasure qubits on Bivariate Bicycle (BB) codes from the quantum low-density parity-check (QLDPC) regime. Owing to their sparse structure and favorable rate-distance trade-offs, BB codes are practical candidates for QEC. We introduce BiBiEQ, a novel framework that compiles a given BB code into an erasure-aware memory circuit C_E. This erasure circuit C_E comprises erasure checks (ECs), resets, and erasures spread over a user-specified erasure check schedule (2EC, 4EC). BiBiEQ converts this erasure circuit C_E into the stabilizer circuit C for general-purpose decoding. BiBiEQ provides two engines for this conversion, BiBiEQ-Exact and BiBiEQ-Approx. BiBiEQ-Exact preserves the joint-erasure correlations and serves as our accuracy benchmark, while BiBiEQ-Approx uses an independence approximation to accelerate large sweeps and expose accuracy-throughput trade-offs. Using BiBiEQ, we decode the stabilizer circuits to get a per-round logical error rate (LER) for the BB codes and quantify the effect of the EC schedules on the correctable operating region below the pseudo-threshold. The 4EC schedule keeps the accuracy of both engines close to one another, making BiBiEQ-Approx a reliable proxy for BiBiEQ-Exact for faster sweeps. Below the pseudo-threshold, the code distance (d) hop from distance (d) 6 to 10 yields a drop in LER by 10-17x larger than distance (d) 10 to 12, showing that most gains are realized by d=10.
High-rate quantum low-density parity-check (qLDPC) codes are a leading candidate for fault-tolerant quantum computing. They feature higher encoding rates than planar alternatives such as the surface code, but their implementation often entails significant hardware hurdles like the need for long-range couplers. We leverage the flexibility of a trapped-ion quantum computer to demonstrate nine quantum error-correcting codes with starkly different qubit connectivity requirements on a single device without any hardware reconfiguration. These experiments span three families of quantum error-correcting codes: qLDPC codes, topological codes, and concatenated codes. With a qLDPC code encoding 4 logical qubits into 18 physical qubits, we achieve a logical error rate up to 9× better than a previous demonstration of a similar code on superconducting solid-state qubits. Moreover, our implementation exhibits breakeven performance, with some instances achieving qubit lifetimes comparable to or slightly exceeding that of our trapped-ion qubits. We use a novel implementation of the optical-metastable-ground (OMG) architecture for addressable mid-circuit measurement and reset, which enables us to perform these experiments without any ion transport or dedicated coolant ions, requirements that typically consume a large fraction of the runtime or ion count of trapped-ion quantum computers.
Suppressing errors is the central challenge for useful large-scale quantum computing. While quantum error correction promises a viable solution to this challenge, existing codes typically suffer from trade-offs among encoding efficiency, error threshold, and hardware feasibility. Here, we introduce Cornucopia codes, a family of practical, hardware-efficient quantum low-density parity-check codes that achieve an ultra-high encoding rate exceeding 1/2 while maintaining a pseudo-threshold exceeding 0.4% under the standard circuit-level noise model. Inspired by recent affine-permutation-based code constructions and the long-range connectivity available in reconfigurable neutral-atom arrays, we adopt a structured code geometry in which the code layout, atom rearrangement, and syndrome-extraction schedule are co-designed. This structure enables nonlocal syndrome measurements through simple, parallel atom rearrangements. A complete syndrome extraction cycle measures all X- and Z-type checks in parallel with 12 entangling layers, independent of the code size. The resulting threshold is comparable to those of the surface code and bivariate bicycle codes. In particular, a single code block [[2844,1426,18]] encodes 1,426 distance-18 logical qubits, achieving an extrapolated logical error rate of 2.6×10−16 (1.9×10−31) per logical qubit per cycle, assuming the physical error rate of 0.1% (0.01%). By comparison, a bivariate bicycle code implementation would require more than 68,000 physical qubits to encode the same number of logical qubits at a comparable logical error rate. These results bring demonstrations of ultra-low-overhead quantum error correction within the reach of near-term quantum processors.
It is widely accepted that quantum error correction is essential for realizing large-scale fault-tolerant quantum computing. Recent experiments have demonstrated error correction codes operating below threshold, primarily using local planar codes such as the surface code and color code. In parallel, theoretical advances in quantum low-density parity-check (LDPC) codes promise significantly lower overheads, albeit at the cost of requiring non-local parity checks. While these results are encouraging, implementing such codes remains challenging for near-term experiments, creating obstacles to holistic benchmarking of hardware architectures capable of supporting long-range couplers. In this work, we present a simple construction recipe for small quantum LDPC codes based on recent developments in the field. Our codes are approximately twice as efficient as comparable surface codes, yet require only weight-four parity checks, which simplifies experimental realization compared to other quantum LDPC codes. We provide concrete proposals for implementations with superconducting qubits in flip-chip architectures and with semiconductor spin qubits using shuttling-based approaches.