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arXiv:2401.12360

Parameter extraction for a superconducting thermal switch (hTron) SPICE model

Valentin Karam, Owen Medeiros, Tareq El Dandachi, Matteo Castellani, Reed A. Foster, Marco Colangelo, Karl K. Berggren

Published Jan 22, 2024• 0 citations
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Abstract

Efficiently simulating large circuits is crucial to the development of superconducting nanowire-based electronics. However, current simulation tools for this technology are not adapted to the scaling of circuit size and complexity. We focus on the multilayered heater-nanocryotron (hTron), a promising superconducting nanowire-based switch used in applications such as superconducting nanowire single-photon detector (SNSPD) readout. Previously, the hTron was modeled using traditional finite-element methods (FEM), which fall short in simulating systems at a larger scale. An empirical-based method would be better adapted to this task, enhancing both simulation speed and agreement with experimental data. In this work, we perform switching current and activation delay measurements on 17 hTron devices. We then develop a method for extracting physical fitting parameters used to characterize the devices. We build a SPICE behavioral model that reproduces the static and transient device behavior using these parameters, and validate it by comparing its performance to a model developed in prior work, showing an improvement in simulation time by several orders of magnitude. Our model provides circuit designers with a tool to help understand the hTron's behavior during all design stages, thus enabling broader use of the hTron across various new areas of application.

DOI
10.48550/arxiv.2401.12360

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Efficiently simulating large circuits is crucial to the development of superconducting nanowire-based electronics. However, current simulation tools for this technology are not adapted to the scaling of circuit size and complexity. We focus on the multilayered heater-nanocryotron (hTron), a promising superconducting nanowire-based switch used in applications such as superconducting nanowire single-photon detector (SNSPD) readout. Previously, the hTron was modeled using traditional finite-element methods (FEM), which fall short in simulating systems at a larger scale. An empirical-based method would be better adapted to this task, enhancing both simulation speed and agreement with experimental data. In this work, we perform switching current and activation delay measurements on 17 hTron devices. We then develop a method for extracting physical fitting parameters used to characterize the devices. We build a SPICE behavioral model that reproduces the static and transient device behavior using these parameters, and validate it by comparing its performance to a model developed in prior work, showing an improvement in simulation time by several orders of magnitude. Our model provides circuit designers with a tool to help understand the hTron's behavior during all design stages, thus enabling broader use of the hTron across various new areas of application.
Superconducting nanowire single-photon detectors (SNSPDs) exhibit complex switching behaviors due to electro thermal feedback during the detection process. Modeling and understanding these behaviors is integral for designing superconducting devices; however, many models often prioritize accuracy over computational speed and intuitive integration for circuit designers. Here, we build upon a growing architecture of SPICE tools for superconducting nanowire devices by capturing complex residual heating effects in a compact thermal model of an SNSPD. We demonstrate that our model is comparable to more complicated thermal models of superconducting nanowire devices, including finite-element simulations, and is applicable for the fast development of SNSPD circuits.
We demonstrate a multilayer nanoscale cryogenic heater-based switch (M-hTron) that uses a normal-metal heater overlapping a thin-film superconductor separated by a thin insulating layer. The M-hTron eliminates leakage current found in three-terminal superconducting switches and applies heat locally to the superconductor, reducing the energy required to switch the device. Modeling using the energy-balance equations and the acoustic mismatch model demonstrates reasonable agreement with experiment. The M-hTron is a promising device for digital superconducting electronics that require high fan-out and offers the possibility of enhancing readout for superconducting-nanowire single-photon detectors.
Superconducting nanowire devices, such as the superconducting nanowire single photon detector (SNSPD) or nanocryotron, have a time-dependent stochasticity that depends on the current flowing through them. When modeling complex circuits made of several such devices (for instance, an array of SNSPDs), the ability to include this randomness can be important for predicting unwanted effects and interactions within the circuit. We present a modification of the model described by Berggren et al. that allows for the inclusion of this stochasticity into the nanowire device model. We then verify the model against experiment using a tungsten silicide SNSPD, and show that the modified model replicates the stochasticity of the physical device.
Superconducting electronics have emerged as a promising platform for advanced information processing, offering unique opportunities for on chip computation and signal manipulation at cryogenic temperatures. These devices hold particular potential in applications ranging from quantum computing to high sensitivity magnetic sensing, where integrated logic and scalable circuit architectures are essential for performing complex computational and signal-processing tasks. In this work, we present a dual-input multilayered heater nanocryotron (hTron) that introduces both multi input functionality and reconfigurable logic capability within a single device. This capability represents a step forward toward realizing more complex computational architectures. In addition, we demonstrate that these devices can, in principle, drive one another and potentially be integrated on a larger scale. Furthermore, the inherent reconfigurability of the demonstrated device allows for dynamic switching between logic operations without requiring additional components which reduces circuit area and simplifies cryogenic and biasing requirements, making the design highly suitable for scalable superconducting computing systems.
Superconducting electronics are among the most promising alternatives to conventional CMOS technology, thanks to the ultra-fast speed and ultra-high energy efficiency of the superconducting devices. Having a cryogenic control processor is also a crucial requirement for scaling the existing quantum computers up to thousands of qubits. Despite showing outstanding speed and energy efficiency, Josephson junction-based circuits suffer from several challenges such as flux trapping leading to limited scalability, difficulty in driving high impedances, and so on. Three-terminal cryotron devices have been proposed to solve these issues, which can drive high impedances (>100 kΩ) and are free from any flux trapping issue. In this work, we develop a reconfigurable logic circuit using a heater cryotron (hTron). In conventional approaches, the number of devices to perform a logic operation typically increases with the number of inputs. However, here, we demonstrate a single hTron device-based logic circuit that can be reconfigured to perform 1-input copy and NOT, 2-input AND and OR, and 3-input majority logic operations by choosing suitable biasing conditions. Consequently, we can perform any processing task with a much smaller number of devices. Also, since we can perform different logic operations with the same circuit (same layout), we can develop a camouflaged system where all the logic gates will have the same layout. Therefore, this proposed circuit will ensure enhanced hardware security against reverse engineering attacks.
Scalable superconducting nanowire single photon detector (SNSPDs) arrays require cryogenic digital circuits for multiplexing the output detection pulses. Among existing superconducting digital devices, superconducting nanowire cryotron (nTron) is a three-terminal device with an ultra-compact size, which is promising for large scale monolithic integration. In this report, in order to evaluate the potential and possibility of using nTrons for reading and digitizing SNSPD signals, we characterized the grey zone, speed, timing jitter and power dissipation of a proper designed nTron. With a DC bias on the gate, the nTron can be triggered by a few μA high and nanoseconds wide input signal, showing the nTron was capable of reading an SNSPD pulse at the same signal level. The timing jitter depended on the input signal level. For a 20 μA high and 5 ns wide input pulse, the timing jitter was 33.3 ps, while a typical SNSPD's jitter was around 50 ps. With removing the serial inductors and operating it in an AC bias mode. The nTron was demonstrated to be operated at a clock frequency of 615.4 MHz, which was faster than the maximum counting rate of a typical SNSPD. In additional, with a 50 Ω bias resistor and biased at 17.6 μA, the nTron had a total power dissipation of 19.7 nW. Although RSFQ circuits are faster than nTrons, for reading SNSPD or other detector arrays that demands less operation speed, our results suggest a digital circuit made from nTrons could be another promising alternative.