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arXiv:2312.08699

SPulseGen: Succinct pulse generator architecture maximizing gate fidelity for superconducting quantum computers

Ryosuke Matsuo, Ogawa, Kazuhisa, H. Shiomi, Makoto Negoro, Takefumi Miyoshi, Michihiro Shintani, Hiromitsu Awano, Takashi G. Sato, Jun Shiomi

Published Dec 14, 2023• 0 citations
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Abstract

This paper proposes a cost-effective architecture for an RF pulse generator for superconducting qubits. Most existing works use arbitrary waveform generators (AWGs) that require both a large amount of high-bandwidth memories and high-performance analog circuits to achieve the highest gate fidelity with an optimized RF pulse waveform. The proposed pulse generator architecture significantly simplifies both the generator circuit and the waveform of the RF pulse to a cost-aware square pulses. This architecture eliminates the requirement for power- and cost-intensive AWG, a major obstacle in realizing scalable quantum computers. Additionally, this paper proposes a process to optimize pulse waveforms to maximize fidelity of gate operations for single and multiple qubits. Quantum dynamics simulation of transmon qubits, wherein the state of system evolves with time, demonstrates that our pulse generator can achieve practically the same gate fidelity as ideal RF pulses, while substantially reducing the performance requirements of memory and analog circuits.

DOI
10.48550/arxiv.2312.08699

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This paper proposes a cost-effective architecture for an RF pulse generator for superconducting qubits. Most existing works use arbitrary waveform generators (AWGs) that require both a large amount of high-bandwidth memories and high-performance analog circuits to achieve the highest gate fidelity with an optimized RF pulse waveform. The proposed pulse generator architecture significantly simplifies both the generator circuit and the waveform of the RF pulse to a cost-aware square pulses. This architecture eliminates the requirement for power- and cost-intensive AWG, a major obstacle in realizing scalable quantum computers. Additionally, this paper proposes a process to optimize pulse waveforms to maximize fidelity of gate operations for single and multiple qubits. Quantum dynamics simulation of transmon qubits, wherein the state of system evolves with time, demonstrates that our pulse generator can achieve practically the same gate fidelity as ideal RF pulses, while substantially reducing the performance requirements of memory and analog circuits.
Superconducting qubits are the promising candidate to realize large-scale quantum computing systems. Well-known quantum algorithms, such as Shor's algorithm, require at least10510^{5}105to10610^{6}106qubits to execute. Accordingly, classical systems for controlling superconducting qubits must also be scalable. One critical scalability challenge lies in the circuit cost of an RF pulse generator used to implement quantum gate operations. This poster proposes a cost-effective architecture for an RF pulse generator tailored to superconducting qubits. Most existing works use arbitrary waveform generators (AWGs) that require both a high-bandwidth memory (HBM) and a high-performance digital-analog converter (DAC) to achieve the highest gate fidelity with an optimized RF pulse waveform. The proposed pulse generator architecture significantly simplifies both the generator circuit and the waveform of the RF pulse to cost-aware square pulses. This architecture eliminates the requirement for power- and cost-intensive AWG, which is a major obstacle in realizing scalable quantum computers. Additionally, this poster demonstrates that our architecture can mitigate the error source associated with simplified RF pulses. Quantum dynamics simulation of transmon qubits, wherein the state of the system evolves with time, demonstrates that our pulse generator can achieve practically the same fidelity of gate operations for single and multiple qubits as ideal RF pulses while substantially reducing the sampling rate of DACs and the bandwidth of memories.
Superconducting quantum processors are manufactured based on a semiconductor process, which makes qubit integration possible. At the same time, this kind of qubit exhibits high-performance fidelity and decoherence time and requires a programmable arbitrary waveform generator (AWG). This paper presents the implementation of an AWG with a sampling rate of two-gigabit samples per second as well as 16-bit vertical resolution digital-to-analog converters. The AWGs are designed for a scaled-up usage scenario by integrating them with separate microwave devices onto a single backplane. A special waveform sequence output controller is designed to realize seamless waveform switching and arbitrary waveform generation. The jitter of multiple AWG channels is around 10 ps, and the integral nonlinearity and differential nonlinearity are both about 2 least significant bits. This customizable AWG has been used in several superconducting quantum processors, and the result of multiple qubits’ measurement verifies that the AWG is qualified for controlling tens of superconducting qubits.
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Superconducting quantum computer is manufactured based on semiconductor process which makes qubits integration possible. At the same time, this kind of qubit exhibits high performance fidelity, de-coherence time, scalability and requires a programmable arbitrary waveform generator (AWG). This paper presents implementation of an AWG which composed of two gigabit samples per second (GSPS) sampling rate, 16 bit vertical resolution digital to analog converters (DACs). The AWG integrated with separate microwave devices onto a metal plate for the scale-up consideration. A special waveform sequence output controller is designed to realize seamless waveform switching and arbitrary waveform generator. The jitter in multiple AWG channels is around 10ps, Integral nonlinearity (INL) as well as differential nonlinearity (DNL) is about 2 LSB, and the qubit performance of the de-coherence time (T2*) achieved 33% promotion over that of a commercial 1 GSPS, 14 bit AWG.
Arbitrary Waveform Generators (AWGs) have widespread applications in telecommunications, quantum computing, and biomedical engineering, among others, due to their ability to generate a wide range of waveforms precisely and instantaneously. This work focuses on developing a scalable and energy-efficient AWG for qubit control. A simple methodology for bringing up a Radio-Frequency System-on-Chip (RFSoC) board and using it to generate various arbitrary waveforms has been discussed. A software-hardware codesign paradigm has been used in this work to dynamically control the output frequency, voltage and shape of the arbitrary waveforms. Similarly, the on-the-fly programmability of four Digital to Analog convertor (DAC) channels and four Analog to Digital Converter (ADC) channels have been tested. The voltage and frequency response of the DAC output has also been characterised to better understand the limitations of the RFSoC. The DAC-ADC loopback characterisation was also performed to prepare the RFSoC for qubit state readout measurements. Over the last few decades, the Direct Digital Synthesiser (DDS) has been a popular choice for generating specific waveforms, such as sinusoidal and ramp waveforms, due to its low cost, simple design, and high precision. Several prior-art works were surveyed, and the trade-offs and strengths of each architecture were summarised. A benchmarking table is prepared based on the Power, Performance and Area (PPA) analysis to make design selection easier for DDS designers. Two Figure of Merit definitions and scaling equations have also been used to normalise the specifications to a target process node (28 nm CMOS), to provide a more accurate comparison among state-of-the-art DDS designs on Application Specific Integrated Circuits (ASICs), and to set expectations for future architectural advancements in DDS design. Finally, a viable DDS-based AWG architecture for ASIC implementation has also been proposed based on the benchmarking.
Current state of the art quantum computing experiments in the microwave regime use control pulses generated by modulating microwave tones with baseband signals generated by an arbitrary waveform generator (AWG). Recent advances in digital analog conversion technology have made it possible to directly synthesize arbitrary microwave pulses with sampling rates up to 92 gigasamples per second (GS/s). These new high bandwidth AWG's could dramatically simplify the classical control chain for quantum computing experiments, enabling more advanced pulse shaping and reducing the number of components that need to be carefully calibrated. Here we use a high speed AWG to study the viability of such a simplified scheme. We characterize the AWG and perform randomized benchmarking of a superconducting qubit, achieving average single qubit gate error rates below 5×10−45\times10^{-4}5×10−4.