High-fidelity spin qubit operation and algorithmic initialization above 1 K
Jonathan Y. Huang, Rocky Y. Su, Wee Han Lim, MengKe Feng, Barnaby van Straaten, Brandon Severin, Will Gilbert, Nard Dumoulin Stuyck, Tuomo Tanttu, Santiago Serrano, Jesús D. Cifuentes, Ingvild Hansen, Amanda E. Seedhouse, Ensar Vahapoglu, Ross C. C. Leon, Nikolay V. Abrosimov, Hans-Joachim Pohl, Michael L. W. Thewalt, Fay E. Hudson, Christopher C. Escott, Natalia Ares, Stephen D. Bartlett, Andrea Morello, André Saraiva, Arne Laucht, Andrew S. Dzurak, Chih Hwan Yang
Abstract The encoding of qubits in semiconductor spin carriers has been recognized as a promising approach to a commercial quantum computer that can be lithographically produced and integrated at scale 1–10 . However, the operation of the large number of qubits required for advantageous quantum applications 11–13 will produce a thermal load exceeding the available cooling power of cryostats at millikelvin temperatures. As the scale-up accelerates, it becomes imperative to establish fault-tolerant operation above 1 K, at which the cooling power is orders of magnitude higher 14–18 . Here we tune up and operate spin qubits in silicon above 1 K, with fidelities in the range required for fault-tolerant operations at these temperatures 19–21 . We design an algorithmic initialization protocol to prepare a pure two-qubit state even when the thermal energy is substantially above the qubit energies and incorporate radiofrequency readout to achieve fidelities up to 99.34% for both readout and initialization. We also demonstrate single-qubit Clifford gate fidelities up to 99.85% and a two-qubit gate fidelity of 98.92%. These advances overcome the fundamental limitation that the thermal energy must be well below the qubit energies for the high-fidelity operation to be possible, surmounting a main obstacle in the pathway to scalable and fault-tolerant quantum computation.
Abstract The encoding of qubits in semiconductor spin carriers has been recognized as a promising approach to a commercial quantum computer that can be lithographically produced and integrated at scale 1–10 . However, the operation of the large number of qubits required for advantageous quantum applications 11–13 will produce a thermal load exceeding the available cooling power of cryostats at millikelvin temperatures. As the scale-up accelerates, it becomes imperative to establish fault-tolerant operation above 1 K, at which the cooling power is orders of magnitude higher 14–18 . Here we tune up and operate spin qubits in silicon above 1 K, with fidelities in the range required for fault-tolerant operations at these temperatures 19–21 . We design an algorithmic initialization protocol to prepare a pure two-qubit state even when the thermal energy is substantially above the qubit energies and incorporate radiofrequency readout to achieve fidelities up to 99.34% for both readout and initialization. We also demonstrate single-qubit Clifford gate fidelities up to 99.85% and a two-qubit gate fidelity of 98.92%. These advances overcome the fundamental limitation that the thermal energy must be well below the qubit energies for the high-fidelity operation to be possible, surmounting a main obstacle in the pathway to scalable and fault-tolerant quantum computation.
Silicon spin qubits are a leading candidate for large-scale quantum computing owing to their compatibility with semiconductor manufacturing. However, scaling to useful fault-tolerant processors will likely generate thermal loads that exceed the cooling power available at millikelvin temperatures. Raising the operating temperature eases cooling requirements but reduces gate fidelity, increasing the overhead of quantum error correction. Identifying the operating temperature that minimizes total power consumption is therefore a key challenge for commercially viable quantum computers. Here, we use gate set tomography to benchmark two-qubit silicon chips fabricated in both industrial and academic environments over a range of temperatures. Elevated temperatures substantially shorten coherence times and increase gate and state-preparation-and-measurement infidelities. Based on these measurements, we develop a general power model for silicon quantum computers that combines cryogenic cooling requirements with error-correction overheads. We show that a finite optimal operating temperature exists and is strongly influenced by a crossover temperature near 1 K in current devices, above which gate fidelity degrades rapidly. These results connect device-level fidelity limitations to system-level power requirements, providing design guidelines for large-scale silicon quantum computers.
Semiconductor spin qubits offer a promising route to compact and scalable quantum computers, combining long coherence times in isotopically purified silicon with compatibility with semiconductor manufacturing. Beyond computational speedup, their energy efficiency is an important consideration for future large-scale systems. We evaluate the power and energy requirements of a Loss-DiVincenzo spin-qubit quantum computer by analyzing the Quantum Fourier Transform (QFT) and benchmarking it against the classical Fast Fourier Transform (FFT). We develop a detailed energy budget, identifying cryogenic cooling as the dominant baseline contribution before quantum error correction (QEC). The comparison between the QFT and the classical FFT reveals that, for any quantum workload operating under a polynomially bounded sampling regime, the crossover in energy consumption occurs at smaller problem sizes than the crossover in execution time. Thus, quantum computing can become energetically competitive before achieving a speedup in execution time. We then incorporate surface-code QEC and analyze the energy costs of QEC cycles, gate synthesis, and decoding. At scale, instrumentation and decoding become dominant contributions, while cryogenic cooling imposes a constraint on scalability. We show that optimizing the control-signal demultiplexing ratio can reduce the overall energy cost by approximately two orders of magnitude. For a system with about one million physical qubits, we estimate a power consumption of approximately 100 kW, at least one order of magnitude below that of today's highest-performance classical computing systems.
Abstract Universal quantum computation will require qubit technology based on a scalable platform1, together with quantum error correction protocols that place strict limits on the maximum infidelities for one- and two-qubit gate operations2, 3. Although various qubit systems have shown high fidelities at the one-qubit level4–10, the only solid-state qubits manufactured using standard lithographic techniques that have demonstrated two-qubit fidelities near the fault-tolerance threshold6 have been in superconductor systems. Silicon-based quantum dot qubits are also amenable to large-scale fabrication and can achieve high single-qubit gate fidelities (exceeding 99.9 per cent) using isotopically enriched silicon11, 12. Two-qubit gates have now been demonstrated in a number of systems13–15, but as yet an accurate assessment of their fidelities using Clifford-based randomized benchmarking, which uses sequences of randomly chosen gates to measure the error, has not been achieved. Here, for qubits encoded on the electron spin states of gate-defined quantum dots, we demonstrate Bell state tomography with fidelities ranging from 80 to 89 per cent, and two-qubit randomized benchmarking with an average Clifford gate fidelity of 94.7 per cent and an average controlled-rotation fidelity of 98 per cent. These fidelities are found to be limited by the relatively long gate times used here compared with the decoherence times of the qubits. Silicon qubit designs employing fast gate operations with high Rabi frequencies16, 17, together with advanced pulsing techniques18, should therefore enable much higher fidelities in the near future.
Abstract High-fidelity control of quantum bits is paramount for the reliable execution of quantum algorithms and for achieving fault tolerance—the ability to correct errors faster than they occur 1 . The central requirement for fault tolerance is expressed in terms of an error threshold. Whereas the actual threshold depends on many details, a common target is the approximately 1% error threshold of the well-known surface code 2,3 . Reaching two-qubit gate fidelities above 99% has been a long-standing major goal for semiconductor spin qubits. These qubits are promising for scaling, as they can leverage advanced semiconductor technology 4 . Here we report a spin-based quantum processor in silicon with single-qubit and two-qubit gate fidelities, all of which are above 99.5%, extracted from gate-set tomography. The average single-qubit gate fidelities remain above 99% when including crosstalk and idling errors on the neighbouring qubit. Using this high-fidelity gate set, we execute the demanding task of calculating molecular ground-state energies using a variational quantum eigensolver algorithm 5 . Having surpassed the 99% barrier for the two-qubit gate fidelity, semiconductor qubits are well positioned on the path to fault tolerance and to possible applications in the era of noisy intermediate-scale quantum devices.
Abstract Future quantum computers capable of solving relevant problems will require a large number of qubits that can be operated reliably 1 . However, the requirements of having a large qubit count and operating with high fidelity are typically conflicting. Spins in semiconductor quantum dots show long-term promise 2,3 but demonstrations so far use between one and four qubits and typically optimize the fidelity of either single- or two-qubit operations, or initialization and readout 4–11 . Here, we increase the number of qubits and simultaneously achieve respectable fidelities for universal operation, state preparation and measurement. We design, fabricate and operate a six-qubit processor with a focus on careful Hamiltonian engineering, on a high level of abstraction to program the quantum circuits, and on efficient background calibration, all of which are essential to achieve high fidelities on this extended system. State preparation combines initialization by measurement and real-time feedback with quantum-non-demolition measurements. These advances will enable testing of increasingly meaningful quantum protocols and constitute a major stepping stone towards large-scale quantum computers.
Abstract Silicon spin qubits offer a promising path to scalable quantum computing due to their compatibility with industrial semiconductor manufacturing. A key requirement for scaling quantum processors is the ability to perform high-fidelity operations in parallel across many qubits. However, simultaneous control remains a major challenge in silicon devices, as fidelities typically degrade under parallel operation. Here we identify microwave-drive-induced a.c.-Stark shifts as the dominant source of this degradation in a five-qubit silicon spin array. We address this by introducing a scalable mitigation protocol based solely on pairwise phase calibrations. Using tailored control pulses on a shared control line, we achieve primitive X and Y gate fidelities well above 99.99% for each qubit individually, with some approaching 99.999%. Furthermore, these fidelities are preserved above 99.99% during simultaneous operation of up to three qubits. During parallel five-qubit operation, fidelities remain above the widely targeted fault-tolerant threshold of 99.9%. By maintaining high-fidelity control during simultaneous operation, shared qubit-control lines can support the development of large-scale semiconductor quantum processors.