Semiconductor spin qubits offer a promising route to compact and scalable quantum computers, combining long coherence times in isotopically purified silicon with compatibility with semiconductor manufacturing. Beyond computational speedup, their energy efficiency is an important consideration for future large-scale systems. We evaluate the power and energy requirements of a Loss-DiVincenzo spin-qubit quantum computer by analyzing the Quantum Fourier Transform (QFT) and benchmarking it against the classical Fast Fourier Transform (FFT). We develop a detailed energy budget, identifying cryogenic cooling as the dominant baseline contribution before quantum error correction (QEC). The comparison between the QFT and the classical FFT reveals that, for any quantum workload operating under a polynomially bounded sampling regime, the crossover in energy consumption occurs at smaller problem sizes than the crossover in execution time. Thus, quantum computing can become energetically competitive before achieving a speedup in execution time. We then incorporate surface-code QEC and analyze the energy costs of QEC cycles, gate synthesis, and decoding. At scale, instrumentation and decoding become dominant contributions, while cryogenic cooling imposes a constraint on scalability. We show that optimizing the control-signal demultiplexing ratio can reduce the overall energy cost by approximately two orders of magnitude. For a system with about one million physical qubits, we estimate a power consumption of approximately 100 kW, at least one order of magnitude below that of today's highest-performance classical computing systems.
Semiconductor spin qubits offer a promising route to compact and scalable quantum computers, combining long coherence times in isotopically purified silicon with compatibility with semiconductor manufacturing. Beyond computational speedup, their energy efficiency is an important consideration for future large-scale systems. We evaluate the power and energy requirements of a Loss-DiVincenzo spin-qubit quantum computer by analyzing the Quantum Fourier Transform (QFT) and benchmarking it against the classical Fast Fourier Transform (FFT). We develop a detailed energy budget, identifying cryogenic cooling as the dominant baseline contribution before quantum error correction (QEC). The comparison between the QFT and the classical FFT reveals that, for any quantum workload operating under a polynomially bounded sampling regime, the crossover in energy consumption occurs at smaller problem sizes than the crossover in execution time. Thus, quantum computing can become energetically competitive before achieving a speedup in execution time. We then incorporate surface-code QEC and analyze the energy costs of QEC cycles, gate synthesis, and decoding. At scale, instrumentation and decoding become dominant contributions, while cryogenic cooling imposes a constraint on scalability. We show that optimizing the control-signal demultiplexing ratio can reduce the overall energy cost by approximately two orders of magnitude. For a system with about one million physical qubits, we estimate a power consumption of approximately 100 kW, at least one order of magnitude below that of today's highest-performance classical computing systems.
Abstract Scalable solutions are essential to achieving the long-term goal of building a fault-tolerant quantum computer and energy-power consumption are fundamental limiting factors for this target. Among the available types of silicon qubits, this work focuses on Flip-Flop (FF) qubits. Energy consumption and power requirements are estimated for a square array of qubits that hosts the logical qubit. The logical qubit is implemented using the rotated Surface Code (SC) for Quantum Error Correction (QEC). By using a universal set of quantum gates, the energy usage, time and power requirements for a SC cycle are estimated based on noise level, code distance and control levels. These estimates are used to provide insights into the main scaling-up challenges for quantum computer development. This is achieved by extending a thermal model that includes energy contributions from both the cryogenic components (such as the qubit array, the cryogenic control electronics, and the cryostat) and the room temperature (RT) section (RT electronics and heat dissipation systems). The maximum numbers of physical and logical qubits are provided, as well as power consumption across the different temperature sections.
Quantum computers are emerging as a promising new technology due to their ability to solve complex problems that exceed the capabilities of classical systems in terms of time. Among various implementations, superconducting qubits have become the leading technology due to their scalability and compatibility with quantum error correction mechanisms. Although time has traditionally been the primary focus, energetic efficiency is becoming an increasingly important consideration, especially with the possibility of a quantum energetic advantage. In this article, the energy consumption of the Semiclassical Quantum Fourier Transform was analyzed on a superconducting quantum computing platform based on cat qubits. Quantum error correction mechanisms were studied and considered in the energy estimations. The results show how the energy consumption scales with the number of qubits and how the most relevant parameters required for qubit stabilization, gate implementation, and error correction codes contribute to the overall energy usage. An optimization method was developed to tune these parameters with the goal of minimizing energy consumption while maintaining qubit fidelities above a given threshold. Additionally, a comparative study with state-of-the-art classical computers indicates a potential quantum energetic advantage for systems with more than 26 qubits, assuming cryogenic systems operating at Carnot efficiency, with this energetic advantage arising before any computational advantage. This behavior persists even when realistic cryogenic systems and control electronics are taken into account.
While extensive research over the past decades has been dedicated to developing scalable quantum computers, the question of their energetic performance has only gained attention more recently, but its importance is now recognized. In fact, quantum computers can only be a viable alternative if their energy cost scales favorably, and some research has shown that there is even a potential quantum energy advantage. In parallel, Rydberg atoms have recently emerged as one of the most promising platforms to implement a large-scale quantum computer. This work aims at contributing first steps to understand the energy efficiency of this platform, by investigating the energy consumption of the different elements of a Rydberg atom quantum computer. First, an experimental implementation of the Quantum Phase Estimation algorithm is analyzed, and an estimation of the energetic cost of executing it is calculated. Then, we derive an estimate of how the energy cost of performing the Quantum Fourier Transform scales with the number of qubits in the Rydberg platform. This analysis facilitates a comparison of the energy consumption of different elements within a Rydberg atom quantum computer, from the preparation of the atoms to the execution of the algorithm, and the measurement of the final state, enabling the evaluation of the energy expenditure of the Rydberg platform and the identification of potential improvements. Finally, we use the Quantum Fourier Transform as an energetic benchmark, comparing the scaling we obtained to that of the execution of the Discrete Fourier Transform in two state-of-the-art classical supercomputers. This comparison indicates that, in an ideal error-free scenario, a quantum energy advantage is achieved in the Rydberg platform for the Fourier Transform, in a regime where classical algorithms are still faster.
Silicon spin qubits are a leading candidate for large-scale quantum computing owing to their compatibility with semiconductor manufacturing. However, scaling to useful fault-tolerant processors will likely generate thermal loads that exceed the cooling power available at millikelvin temperatures. Raising the operating temperature eases cooling requirements but reduces gate fidelity, increasing the overhead of quantum error correction. Identifying the operating temperature that minimizes total power consumption is therefore a key challenge for commercially viable quantum computers. Here, we use gate set tomography to benchmark two-qubit silicon chips fabricated in both industrial and academic environments over a range of temperatures. Elevated temperatures substantially shorten coherence times and increase gate and state-preparation-and-measurement infidelities. Based on these measurements, we develop a general power model for silicon quantum computers that combines cryogenic cooling requirements with error-correction overheads. We show that a finite optimal operating temperature exists and is strongly influenced by a crossover temperature near 1 K in current devices, above which gate fidelity degrades rapidly. These results connect device-level fidelity limitations to system-level power requirements, providing design guidelines for large-scale silicon quantum computers.
This thesis deals with the problematics of the scalability of fault-tolerant quantum computing. This question is studied under the angle of estimating the resources needed to set up such computers. What we call a resource is, in principle, very general; it could be the power, the energy, the total bandwidth allocated to the different qubits... However, we mainly focus on the energetic cost of quantum computing. In particular, we develop an inter-disciplinary approach that allows to minimize the resources required to implement algorithms on quantum computers. By asking to find the minimum amount of resources required to perform a computation under the constraint that the algorithm provides a correct answer with a targeted accuracy, it is possible to optimize the whole computer in order to minimize the resources spent, while being sure to have a correct answer with a high probability. We apply this approach to a complete model fault-tolerant quantum computer based on superconducting qubits. Our results indicate that for algorithms implemented on thousands of logical qubits, our method makes it possible to reduce the energetic cost by orders of magnitudes in regimes where, without optimizing, the power consumption could be close to the gigawatt. This work illustrates that the energetic cost of quantum computing should be a criterion in itself, allowing to evaluate the scaling potential of a given quantum computer technology. It also illustrates that optimizing the architecture of a quantum computer, via inter-disciplinary methods, including algorithms, error correction, qubit physics, engineering aspects, such as the ones that we propose, can prove to be a powerful tool, clearly improving the scaling potential of quantum computers. Finally, we provide general hints about how to make fault-tolerant quantum computers energy efficient.
The promise of fault-tolerant quantum computation rests on its ability to solve certain intractable problems exponentially faster than classical computers. However, this theoretical promise is challenged by a cascade of interconnected physical bottlenecks, where the act of scaling quantum resources to suppress errors creates insurmountable thermal and classical processing loads. This paper develops an integrated thermal equilibrium model that quantitatively links physical gate fidelity, quantum error correction (QEC) overhead, and cryogenic cooling capacity to determine the viability of a large-scale system. Through numerical analysis of a system designed to execute Shor’s algorithm, the model demonstrates that even under optimistic technological assumptions, the required physical resources—in terms of qubit count, cooling power, and classical decoding speed—remain orders of magnitude beyond plausible near-term capabilities. The findings indicate that the primary barrier to scalable quantum computation is not a single engineering challenge but a systemic, multi-physics resource gap, where the polynomial scaling of classical support systems fails to keep pace with the exponential demands of the quantum core. This suggests that progress requires a holistic co-design of algorithms, hardware, and control systems rather than isolated improvements in qubit count alone.