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arXiv:2211.00143

The Quantum Socket and DemuXYZ-Based Gates with Superconducting Qubits

J. H. Béjanin, C. T. Earnest, M. Mariantoni

Published Oct 31, 2022• 1 citation
arXivHTMLPDF

Abstract

Building large-scale superconducting quantum computers requires two complimentary elements: scalable wiring techniques and multiplex architectures. In our previous work [Béjanin et al., Phys. Rev. Applied 6, 044010 (2016)], we have introduced and characterized a truly vertical interconnect named the quantum socket. In this paper, we exercise the quantum socket using high-coherence flux-tunable Xmon transmon qubits. In particular, we test potential qubit heating and one-qubit gate performance. We observe no heating effects and time-stable gate fidelities in excess of 99.9%. We then propose and experimentally characterize a demultiplexed gate technique based on flux pulses and a common continuous drive signal: DemuXYZ. We discuss DemuXYZ's working principle, show its operation, and perform quantum process tomography on a selection of one-qubit gates to confirm proper operation. We obtain fidelities around 93% likely limited by flux-pulse imperfections. We finally discuss future solutions for wiring integration as well as improvements to the DemuXYZ technique.

DOI
10.48550/arxiv.2211.00143

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Building large-scale superconducting quantum computers requires two complimentary elements: scalable wiring techniques and multiplex architectures. In our previous work [Béjanin et al., Phys. Rev. Applied 6, 044010 (2016)], we have introduced and characterized a truly vertical interconnect named the quantum socket. In this paper, we exercise the quantum socket using high-coherence flux-tunable Xmon transmon qubits. In particular, we test potential qubit heating and one-qubit gate performance. We observe no heating effects and time-stable gate fidelities in excess of 99.9%. We then propose and experimentally characterize a demultiplexed gate technique based on flux pulses and a common continuous drive signal: DemuXYZ. We discuss DemuXYZ's working principle, show its operation, and perform quantum process tomography on a selection of one-qubit gates to confirm proper operation. We obtain fidelities around 93% likely limited by flux-pulse imperfections. We finally discuss future solutions for wiring integration as well as improvements to the DemuXYZ technique.
Maintaining or even improving gate performance with growing numbers of parallel controlled qubits is a vital requirement for fault-tolerant quantum computing.For superconducting quantum processors, though isolated one-or two-qubit gates have been demonstrated with high fidelity, implementing these gates in parallel commonly shows worse performance.Generally, this degradation is attributed to various crosstalks between qubits, such as quantum crosstalk due to residual inter-qubit coupling.An understanding of the exact nature of these crosstalks is critical to figuring out respective mitigation schemes and improved qubit architecture designs with low crosstalk.Here we give a theoretical analysis of quantum crosstalk impact on simultaneous gate operations in a qubit architecture, where fixed-frequency transmon qubits are coupled via a tunable bus, and sub-100-ns controlled-Z (CZ) gates can be realized by applying a baseband flux pulse on the bus.Our analysis shows that for microwave-driven single-qubit gates, the dressing from the qubit-qubit coupling can cause non-negligible cross-driving errors when qubits operate near frequency collision regions.During CZ gate operations, although unwanted nearest-neighbor interactions are nominally turned off, sub-MHz parasitic next-nearest-neighbor interactions involving spectator qubits can still exist, causing considerable leakage or control error when one operates qubit systems around these parasitic resonance points.To ensure high-fidelity simultaneous operations, a request could be raised to figure out a better way to balance the gate error from target qubit systems themselves and the error from nonparticipating spectator qubits.Overall, our analysis suggests that towards useful quantum processors, the qubit architecture should be examined carefully in the context of high-fidelity simultaneous gate operations in a scalable qubit lattice.
Abstract The interconnection bottleneck caused by limitations of cable number, inner space and cooling power of dilution refrigerators has been an outstanding challenge for building scalable superconducting quantum computers with the increasing number of qubits in quantum processors. To surmount such an obstacle, it is desirable to integrate qubits with quantum–classical interface (QCI) circuits based on rapid single flux quantum (RSFQ) circuits. In this work, a digital flux tuner for qubits (DFTQ) is proposed for manipulating flux of qubits as a crucial part of the interface circuit. A schematic diagram of the DFTQ is presented, consisting of a coarse tuning unit and a fine-tuning unit for providing magnetic flux with different precision to qubits. The method of using DFTQ to provide flux for gate operations is discussed from the optimization of circuit design and input signal. To verify the effectiveness of the method, simulations of a single DFTQ and quantum gates including a Z gate and an iSWAP gate with DFTQs are performed for flux-tunable transmons. The quantum process tomography corresponding to the two gates is also carried out to analyze the sources of gate error. The results of tomography show that the gate fidelities independent of the initial states of the Z gate and the iSWAP gate are 99.935% and 99.676%, respectively. With DFTQs inside, the QCI would be a powerful tool for building large-scale quantum computers.
Recent experiments have demonstrated superconducting transmon qubits with semiconductor nanowire Josephson junctions. These hybrid gatemon qubits utilize field effect tunability characteristic of semiconductors to allow complete qubit control using gate voltages, potentially a technological advantage over conventional flux-controlled transmons. Here, we present experiments with a two-qubit gatemon circuit. We characterize qubit coherence and stability and use randomized benchmarking to demonstrate single-qubit gate errors below 0.7% for all gates, including voltage-controlled Z rotations. We show coherent capacitive coupling between two gatemons and coherent swap operations. Finally, we perform a two-qubit controlled-phase gate with an estimated fidelity of 91%, demonstrating the potential of gatemon qubits for building scalable quantum processors.
The strong requirement for high-performing quantum computing led to intensive research on novel quantum platforms in the last decades. The circuital nature of Josephson-based quantum superconducting systems powerfully supports massive circuital freedom, which allowed for the implementation of a wide range of qubit designs, and an easy interface with the quantum processing unit. However, this unavoidably introduces a coupling with the environment, and thus to extra decoherence sources. Moreover, at the time of writing, control and readout protocols mainly use analogue microwave electronics, which limit the otherwise reasonable scalability in superconducting quantum circuits. Within the future perspective to improve scalability by integrating novel control energy-efficient superconducting electronics at the quantum stage in a multi-chip module, we report on an all-microwave characterization of a planar two-transmon qubits device, which involves state-of-the-art control pulses optimization. We demonstrate that the single-qubit average gate fidelity is mainly limited by the gate pulse duration and the quality of the optimization, and thus does not preclude the integration in novel hybrid quantum-classical superconducting devices.
Abstract We have integrated single and coupled superconducting transmon qubits into flip-chip modules. Each module consists of two chips—one quantum chip and one control chip—that are bump-bonded together. We demonstrate time-averaged coherence times exceeding 90 μs, single-qubit gate fidelities exceeding 99.9%, and two-qubit gate fidelities above 98.6%. We also present device design methods and discuss the sensitivity of device parameters to variation in interchip spacing. Notably, the additional flip-chip fabrication steps do not degrade the qubit performance compared to our baseline state-of-the-art in single-chip, planar circuits. This integration technique can be extended to the realisation of quantum processors accommodating hundreds of qubits in one module as it offers adequate input/output wiring access to all qubits and couplers.
The discovery of quantum mechanics in the 20th century forms the basis of many of the technologies that define our lives today. The ability to engineer and manipulate individual quantum systems -- even create artificial atoms -- promises a similar revolutionary leap in technology. A quantum technology of particular interest is quantum computing, which has the potential to solve problems that are intractable for classical computers, opening up new domains of computation. Meanwhile, an attractive approach to creating engineered quantum systems is circuit quantum electrodynamics (cQED). Where research initially focused on understanding the physics of cQED devices, focus has shifted to building systems capable of performing useful computations. However, this remains extremely challenging, in part due to the inherently fragile nature of the individual quantum bits, but also due to difficulties in controlling and scaling up these systems. This thesis focuses on the control aspects of building an extensible full-stack quantum computer based on superconducting transmon qubits. We define the demonstration of quantum fault-tolerance as our target application to give focus to our efforts. The QuSurf architecture for a full-stack quantum computer presented in this thesis is designed with this application in mind. We provide a detailed study of the error sources present in this system and give an overview of the relevant characterization techniques. In the second part of this thesis, we address several key challenges in the control of a quantum computer. To realize high-fidelity coherence limited gates, we present a novel tuneup protocol that achieves a tenfold speedup over the state-of-the-art. This is realized by eliminating the need for qubit initialization. We demonstrate this protocol by calibrating single-qubit gates to a coherence limited Clifford fidelity of 99.9% in one minute. Performing repeated parity checks, as is required for quantum error correction, requires reusing qubits quickly after they have been measured. By introducing a numerically optimized depletion pulse we are able to speeds up the depletion of measurement photons in a readout resonator without having to rely on specific symmetry conditions. Using this technique speed up photon depletion by more than six inverse resonator linewidths, reducing the error rate in an emulated ancilla parity check by a factor 75. Flux-pulsing based two-qubit gates are the fastest two-qubit gates. However, they are also very technically demanding. The key challenge in performing these gates is addressing the distortions that control signals experience as they traverse various electrical components. We have developed Cryoscope (short for cryogenic oscilloscope) to characterize and correct these distortions. Cryoscope is an in-situ technique that uses the qubit to sample control pulses of arbitrary shape. Even when correcting distortions to within sim0.1\\sim 0.1\\%sim0.1 two-qubit gates are history-dependent due to the long timescale upon which some of these distortions act. We have invented Net-Zero, a new type of flux-pulsing based two-qubit gate, to address this problem. It makes use of a symmetry condition of the transmon to have net-zero integral, making the gate resilient to long-timescale distortions. The gate suppresses leakage out of the computational subspace to 0.1% by making use of leakage interference and has a built-in echo effect that enhances the coherence of the gate, achieving a two-qubit gate fidelity of 99.1%. Custom software is required to perform the physics experiments needed to build and operate a quantum computer. PycQED is an open-source software framework we have developed for this purpose. We discuss the design choices and concepts of PycQED before turning our focus to characterization and calibration. Here we introduced dependency graphs as a useful abstraction and system emulation as an essential development tool for automating the characterization and calibration process. We conclude the thesis by reflecting on the limitations of our architecture and providing an outlook on the grand challenges of building a useful kilo-qubit sized quantum computer. We define these challenges as The Application Problem, The Fabrication Problem, and The Calibration Problem.