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arXiv:2204.07568

Establishing trust in quantum computations

Timothy J Proctor, Stefan Seritan, Erik Nielsen, Kenneth Rudinger, Kevin C Young, Robin Blume-Kohout, Mohan Sarovar

Published Apr 15, 2022• 6 citations
arXivHTMLPDF

Abstract

Quantum computing hardware has grown sufficiently complex that it often can no longer be simulated by classical computers, but its computational power remains limited by errors. These errors corrupt the results of quantum algorithms, and it is no longer always feasible to use classical simulations to directly check the correctness of quantum computations. Without practical methods for quantifying the accuracy with which a quantum algorithm has been executed, it is difficult to establish trust in the results of a quantum computation. Here we solve this problem, by introducing a simple and efficient technique for measuring the fidelity with which an as-built quantum computer can execute an algorithm. Our technique converts the algorithm's quantum circuits into a set of closely related ``mirror circuits'' whose success rates can be efficiently measured. It enables measuring the fidelity of quantum algorithm executions both in the near-term, with algorithms run on hundreds or thousands of physical qubits, and into the future, with algorithms run on logical qubits protected by quantum error correction.

DOI
10.48550/arxiv.2204.07568

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Quantum computing hardware has grown sufficiently complex that it often can no longer be simulated by classical computers, but its computational power remains limited by errors. These errors corrupt the results of quantum algorithms, and it is no longer always feasible to use classical simulations to directly check the correctness of quantum computations. Without practical methods for quantifying the accuracy with which a quantum algorithm has been executed, it is difficult to establish trust in the results of a quantum computation. Here we solve this problem, by introducing a simple and efficient technique for measuring the fidelity with which an as-built quantum computer can execute an algorithm. Our technique converts the algorithm's quantum circuits into a set of closely related ``mirror circuits'' whose success rates can be efficiently measured. It enables measuring the fidelity of quantum algorithm executions both in the near-term, with algorithms run on hundreds or thousands of physical qubits, and into the future, with algorithms run on logical qubits protected by quantum error correction.
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Quantum performance simulators can provide practical metrics for the effectiveness of executing theoretical quantum information processing protocols on physical hardware. In this work we present a scheme to simulate the performance of fault tolerant quantum computation by automating the tracking of common fault paths for error propagation through a circuit and quantifying the fidelity of each qubit throughout the computation. Our simulation tool outputs the expected execution time, required number of qubits and the final error rate of running common fault tolerant protocols on a universal hardware, assumed to be a network of qubits with full connectivity. Our technique efficiently estimates the upper bound of error probability and provides a useful performance measure of the error threshold at low error rates where conventional Monte Carlo methods are ineffective. To verify the proposed simulator, we present simulation results comparing the execution of quantum adders which constitute a major part of Shor's algorithm.
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Abstract Fidelity is one of the most valuable and commonly used metrics for assessing the performance of quantum circuits on error-prone quantum processors. Several approaches have been proposed to estimate circuit fidelity without executing it on quantum hardware, but they often face limitations in scalability or accuracy. In this work, we present a comprehensive theoretical framework to predict the fidelity of quantum circuits under depolarizing noise. Building on theoretical results, we propose an efficient fidelity estimation algorithm based on device calibration data. The method is thoroughly validated through simulation and execution on real hardware, demonstrating improved accuracy compared to state-of-the-art alternatives, with enhancements in prediction R 2 ranging from 4.96% to 213.54%. The proposed approach provides a scalable and practical tool for benchmarking quantum hardware, comparing quantum software techniques such as compilation methods, obtaining computation bounds for quantum systems, and guiding hardware design decisions, making it a critical resource for developing and evaluating quantum computing technologies.
Quantum computation holds the promise of solving certain complex problems exponentially faster than classical computers. However, the high prevalent noise in current quantum devices impedes the accurate execution of even basic algorithms. This can be remedied by protecting quantum information with a quantum error-correcting code, where the logical information of an algorithmic qubit is spread across multiple physical qubits. Individual quantum errors are then located and corrected by the fault-tolerant measurement of multi-qubit stabilizer operators (parity checks). Unfortunately, error correction and fault tolerance both impose large demands on the qubit overhead: hundreds to thousands of physical qubits per logical qubit. We reduce the spacetime cost of fault tolerance by redesigning key building blocks of an error-corrected quantum computer. First, we develop a combinatorial proof with flag fault tolerance that exponentially reduces the extra qubits needed to measure a stabilizer of any size, while tolerating one fault. We leverage these proofs to then design state preparation circuits for the Steane and Golay codes with 100% yield. Next, we improve error correction on a planar layout by showing that a distance-four code encoding six logical qubits protects information as well as the distance-five surface code, using one-tenth as many physical qubits. Finally, we optimize the time overhead of logical gates in surface code quantum computers by protecting measurement results with a classical code, cutting computation time by a factor of two to six. Our hardware-agnostic optimizations of fault tolerance overheads thus suggest new routes to advance the timeline of error-free quantum computing.
Quantum computing promises to solve some problems that are intractable by classical computers. Several quantum processors based on different technologies and consisting of a few tens of noisy qubits have already been developed. However, qubits are fragile as they tend to decohere extremely quickly and quantum operations are faulty, making reliable computation very difficult. Moreover, quantum processors have hardware constraints such as limited qubit connectivity and shared classical control, making quantum algorithms not directly executable. This thesis focuses on some of the challenges of the implementation of quantum algorithms on near-termintermediate-scale and future large-scale quantum processors. More precisely, it investigates how to perform reliable quantum computation using fault-tolerant protocols and how to execute quantum algorithms on hardware-constrained processors using circuit-mapping techniques.