Quantum computing promises to solve some problems that are intractable by classical computers. Several quantum processors based on different technologies and consisting of a few tens of noisy qubits have already been developed. However, qubits are fragile as they tend to decohere extremely quickly and quantum operations are faulty, making reliable computation very difficult. Moreover, quantum processors have hardware constraints such as limited qubit connectivity and shared classical control, making quantum algorithms not directly executable. This thesis focuses on some of the challenges of the implementation of quantum algorithms on near-termintermediate-scale and future large-scale quantum processors. More precisely, it investigates how to perform reliable quantum computation using fault-tolerant protocols and how to execute quantum algorithms on hardware-constrained processors using circuit-mapping techniques.
Quantum computing promises to solve some problems that are intractable by classical computers. Several quantum processors based on different technologies and consisting of a few tens of noisy qubits have already been developed. However, qubits are fragile as they tend to decohere extremely quickly and quantum operations are faulty, making reliable computation very difficult. Moreover, quantum processors have hardware constraints such as limited qubit connectivity and shared classical control, making quantum algorithms not directly executable. This thesis focuses on some of the challenges of the implementation of quantum algorithms on near-termintermediate-scale and future large-scale quantum processors. More precisely, it investigates how to perform reliable quantum computation using fault-tolerant protocols and how to execute quantum algorithms on hardware-constrained processors using circuit-mapping techniques.
Many important physical and mathematical problems are difficult to solve on classical computers, resulting in difficulty in finding new advanced materials, simulating quantum field theories and solving large combinatorial optimisation tasks. Quantum computers have shown great promise in being able to solve these (and many other) problems faster than their classical counterparts, and therefore should be thoroughly investigated as a significant tool for enabling the acceleration of scientific progress. This work develops methods to tackle several problems across the spectrum of quantum algorithms, providing methods suitable for the near-term hardware, to the future where large fault-tolerant quantum computers exist. Therefore, the works in this thesis range from efficiently making use of limited quantum hardware to taking advantage of hardware benefits (e.g. excess qubits) as quantum computation advances. Covered topics include: an alternative paradigm for the optimisation of variational circuits and quantum neural networks; techniques for improving energy estimation of quantum states through the collection and processing of large amounts of randomised measurement data; the use of entanglement in guiding the automatic discovery of quantum circuits; investigating the role of symmetries in adiabatic state preparation of molecules and the large scale parallelisation of a common fault-tolerant subroutine, potentially producing large runtime speed-ups for the simulation of chemistry on quantum computers. Although there are many challenges remaining from both hardware and algorithms perspectives before the large-scale utility of quantum computers can be demonstrated, the contributions of this work make steps towards the efficient utilisation of quantum hardware that will be available in the coming years.
A reliable large-scale quantum computer would be able to solve problems in physics and chemistry exponentially faster than current classical processors. A large-scale quantum device has not been built because quantum systems are naturally sensitive to environmental influences which manifest as errors in memory and operations during computation. For a large-scale device to become a reality, protocols must be developed that reduce the influence of errors during computation in a manner that maintains scalability of the device. This scalability criteria requires the protocols developed to handle errors must be implemented in a way such that the size of the quantum system and number of operations grows in a tractable manner. Furthermore, the sources of errors must be modeled accurately for true assessments of the viability of these protocols. In this dissertation, we present an investigation into methods of performing reliable quantum computation in the presence of errors in small quantum systems (< 50 qubits). These methods should be considered as software primitives used to built reliable large-scale quantum algorithms and quantum memories. These methods occur in two flavors: quantum error correction and fault-tolerant operations. For quantum error correction, we perform assessments of error correction in the presence of error sources indicative of ion trap quantum computers. For fault-tolerant operations, we investigate the quantum resource cost and efficacy of implementing various techniques for performing reliable operations that would allow for a quantum advantange in a large-scale device.
Quantum computing promises to revolutionize several scientific and technological domains through fundamentally new ways of processing information. Among its most compelling applications is digital quantum simulation, where quantum computers are used to replicate the behavior of other quantum systems. This could enable the study of problems that are otherwise intractable on classical computers, transforming fields such as quantum chemistry, condensed matter physics, and materials science. Despite this potential, realizations of practical quantum advantage for relevant problems are hindered by imperfections of current devices. This also affects quantum hardware based on superconducting circuits which is among the most advanced and scalable platforms. The envisaged long-term solution of fault-tolerant quantum computers that correct their own errors remains out of reach mainly due to the associated qubit number overhead. As a result, the field has developed strategies that combine quantum and classical resources, exploit hardware-native operations, and employ error mitigation techniques to extract meaningful results from noisy data. This doctoral thesis contributes to this broader effort by exploring methods for advancing quantum simulation across the full computational stack, including hardware-level innovations, refined techniques for noise modeling and error mitigation, and algorithmic improvements enabled by efficient measurement processing.
Quantum computers promise to solve computational problems that are inaccessible to classical machines. The reliable execution of large-scale quantum algorithms requires robust operations in the presence of noise. Quantum error correction addresses this challenge by encoding quantum information redundantly across several physical qubits, such that errors can be detected and corrected during a computation. However, no single error-correcting code intrinsically supports an inherently robust, fault-tolerant implementation of all gates needed for universal quantum computing. Moreover, most modern approaches to both quantum error correction and the implementation of universal logical operations on encoded qubits rely on mid-circuit measurements and feed-forward control. These types of operations are technologically demanding, often slow, and prone to high error rates, and they limit the overall success probability of quantum algorithms. In this thesis, we develop fault-tolerant protocols and circuits for quantum error correction and universal logical computation, with an emphasis on implementations compatible with current hardware systems. We first focus on fault-tolerant quantum error correction on small codes. By comparing different protocols, we identify trade-offs between compact circuit constructions and their robustness to noise. We then assess their practical performance by comparing numerical simulations of noisy circuits with experimental data. Beyond the preservation of encoded information, we study how universal logic can be implemented in a fault-tolerant manner on encoded qubits. A central approach considered in this thesis is code switching, in which logical information is transferred between two distinct error-correcting codes that support complementary sets of inherently fault-tolerant logical gates. In combination, these codes give access to a complete universal fault-tolerant logical gate set. In this thesis, we determine conditions that allow us to construct fault-tolerant protocols for code switching. We adapt these protocols to the capabilities of current hardware, thereby enabling the first experimental realization of universal fault-tolerant logic by means of code switching. However, the overall performance of these schemes is limited by slow and noisy mid-circuit measurements. To address this bottleneck, we construct a suite of measurement-free fault-tolerant universal operations that do not require any measurements during the execution of an algorithm. In this framework, error correction and logical operations are implemented coherently as part of the quantum circuit, without mid-circuit measurements or in-sequence classical control. We introduce measurement-free code-switching schemes that can be scaled to arbitrary code distances through concatenation, and which thereby provide, in principle, arbitrarily strong error suppression. We further tailor our approach to the capabilities of current trapped-ion quantum processors. New circuit constructions support the first experimental implementation of a logical quantum algorithm without mid-circuit measurements, demonstrated through Grover's search on three encoded qubits. Together, the results of this thesis expand the toolbox for early fault-tolerant quantum computation. They show how protocols for quantum error correction and universal logical gates can be designed without mid-circuit measurements with realistic hardware constraints in mind, opening new pathways towards universal quantum logic.
Quantum computation has the potential to solve certain mathematical and physical problems faster than a classical computer. However, one of the key challenges to realizing a quantum computing device is controlling systematic errors and maintaining the coherence of the quantum state. In addition, once a scalable quantum computer is built, we must be able to fault-tolerantly communicate a quantum algorithm to the physical device. In this dissertation, we take several significant steps towards the realization of a quantum computer. We develop a framework for use with any proposed technology to map a quantum algorithm into fault-tolerant machine instructions. Within this framework, we combat errors and decoherence by introducing quantum error correction and fault tolerance into a quantum circuit. We analyze specific fault-tolerant circuitry on two general architectures, nonlocal and nearest-neighbor, to determine failure thresholds of the physical circuit components. These failure thresholds allow physicists to evaluate technology proposals. Our goal is to provide design tools, failure thresholds, and fault-tolerant constructions to combat the faultiness of quantum computation.
This thesis presents an overview of my published work on streamlining and optimizing quantum processors. Complete, microscopic, quantum-gate–by–quantum-gate simulations of a variety of quantum circuits are implemented and executed on state-of-the-art multi-processor parallel computers. A host of analytical scaling formulas addressing the quality of quantum processors, e.g., in the presence of realistic gate errors and defects, are presented. These formulas reliably describe the practically interesting, large-number-of-qubit regime, inaccessible to simulations on classical computers. Much of the technical details may be found in my published articles, which appear in the Appendix. This thesis also presents the generic and specific directions into which my current investigations are headed. In addition, several preliminary results are presented and discussed.