Challenges
Datasets
Workspaces
Papers
Discussions
Leaderboard
Log inSign up
Challenges
Datasets
Workspaces
Papers
Discussions
Leaderboard
Blog
Job Board
Q3AS

© 2026 Aqora Quantum S.A.S.

TermsPrivacyLegal Notice

arXiv:2110.11493 · PRX Quantum

Surface Code Compilation via Edge-Disjoint Paths

Michael E. Beverland, Vadym Kliuchnikov, Eddie Schoute

Published May 25, 2022• 61 citations
arXivHTMLPDF

Abstract

We provide an efficient algorithm to compile quantum circuits for fault-tolerant execution.We target surface codes, which form a two-dimensional grid of logical qubits with nearest-neighbor logical operations.Embedding an input circuit's qubits in surface codes can result in long-range two-qubit operations across the grid.We show how to prepare many long-range Bell pairs on qubits connected by edge-disjoint paths of ancillae in constant depth that can be used to perform these long-range operations.This forms one core part of our edge-disjoint path compilation (EDPC) algorithm, by easily performing many parallel long-range Clifford operations in constant depth.It also allows us to establish a connection between surface code compilation and several well-studied edge-disjoint path problems.Similar techniques allow us to perform non-Clifford single-qubit rotations far from magic state distillation factories.In this case, we can easily find the maximum set of paths by a max-flow reduction, which forms the other major part of EDPC.EDPC has the best asymptotic worst-case performance guarantees on the circuit depth for compiling parallel operations when compared to related compilation methods based on SWAP gates and network coding.EDPC also shows a quadratic depth improvement over sequential Pauli-based compilation for parallel rotations requiring magic resources.We implement EDPC and find significantly improved performance for circuits built from parallel controlled-NOT (CNOT) gates, and for circuits that implement the multicontrolled X gate C k NOT.

DOI
10.1103/prxquantum.3.020342

Related papers

Nearest-neighbour gates are all you need: High-rate quantum low-density parity-check codes on a planar grid

Boren Gu, Tamas Noszko, Vincent Steffan +4 more

High-performance quantum low-density parity-check codes promise substantial reductions in the overhead of fault-tolerant quantum computation, but most constructions require long-range connectivity or qubit shuttling, both of which are difficult to realise in superconducting architectures. Here we introduce a family of quantum low-density parity-check codes that, for the first time, combines planar open-boundary layouts, finite-size advantages over surface codes, and syndrome extraction using only nearest-neighbour gates on a planar grid of qubits with either square or hexagonal connectivity. The resulting circuits achieve optimal constant-depth stabiliser measurement, independent of code size, and naturally remove leakage from the system by exchanging the roles of check and data qubits at each syndrome extraction round. We find finite-size instances such as a [[323,14,15]] code, whose code-efficiency ratio is nearly an order of magnitude larger than that of rotated surface-code patches. At around 40 circuit qubits per logical qubit, the best directional tile-code layouts reduce the per-logical per-round logical error rate by a factor of 100 relative to rotated surface-code memories. These results show that the advantages of quantum low-density parity-check codes can survive compilation into strictly planar nearest-neighbour circuits, bringing low-overhead fault-tolerant memories closer to near-term hardware.

quant-pharXiv:2606.19482•Jun 19, 2026•0 citations

Partition-based Surface Code Compilation

Hanjing Xu, Xiaoyuan Liu, Ankit Kulshrestha +1 more

Surface codes are widely considered to be one of the most promising methods for achieving fault-tolerant quantum computation on noisy intermediate-scale quantum (NISQ) computers. One of the computational challenges involved is in transpiling the logical circuit to a form that is compatible with the physical hardware that has limited qubit connectivity. In particular, the goal is to first determine a mapping from the logical qubits in the input circuit to the surface code topology, and then route them via Bell pairs, in a manner that minimizes the total execution time. We refer to this problem as the surface code logical qubit mapping and routing problem. In this work, we formulate the mapping problem as a mixed integer program (MIP) and implement an edge-disjoint path algorithm for routing. In order to handle circuits with a larger number of qubits, we introduce a divide-and-conquer (DC) strategy for scalable mapping. We evaluate our MIP-based mapping approach against structural and random mapping baselines, demonstrating improved performance on both large-scale synthetic circuits and circuits from existing quantum algorithms.

IEEE High Performance Extreme Computing Conference•Sep 15, 2025•0 citations

Logical-to-Physical Compilation for Reducing Depth in Distributed Quantum Systems

Folkert de Ronde, Stephan Wong, Sebastian Feld

Quantum computing is expected to become a foundational technology for solving problems that exceed the capabilities of classical systems. As quantum algorithms and hardware technologies continue to advance, the need for scalable architectures becomes increasingly clear. Distributed quantum computing offers a promising path forward by interconnecting multiple smaller processors into a larger, more powerful system. However, distributed quantum computing introduces significant circuit depth overhead, as logical operations are typically decomposed into sequential physical procedures that require entanglement generation. These sequential operations limit the reliability of quantum algorithms in the NISQ era due to noise. In this work, we present a compiler that integrates logical-to-physical decomposition with depth-aware rescheduling to reduce the execution cost of distributed quantum circuits. The compiler identifies sequences of logical CNOT gates that share a control or target qubit, reschedules them into parallel instruction groups, and applies decompositions that allow multiple gates to be executed simultaneously using distributed shared entanglement resources. An algorithm is proposed that ensures parallelism is created when possible while keeping logical equivalence and that circuit depth is never increased. Benchmark results demonstrate that the compiler consistently reduces circuit depth for circuits containing inherently sequential CNOT structures, while leaving already-parallel circuits unchanged. These results highlight the value of combining scheduling and hardware-aware decomposition, and establish the compiler as a practical tool for improving the fidelity of distributed quantum computations.

quant-pharXiv:2603.29536•International Conference on Computer Communications and Networks (ICCCN)•Apr 1, 2026•0 citations

Compilation Pipeline for Predicting Algorithmic Break-Even in an Early-Fault-Tolerant Surface Code Architecture

Tianyi Hao, Joseph Sullivan, Sivaprasad Omanakuttan +2 more

Recent experimental progress in realizing surface code on hardware, including demonstrations of break-even logical memory on devices with up to hundreds of physical qubits, has materially advanced the prospects for fault-tolerant quantum computation. This progress creates urgency for the development of compilation workflows that directly target the forthcoming generation of devices with thousands of physical qubits, for which algorithm execution becomes practical. We develop a pipeline for compiling logical algorithms to physical circuits implementing lattice surgery on the surface code, and use this pipeline to identify the requirements for achieving algorithmic break-even -- where quantum error correction improves the performance of a quantum algorithm -- for two prominent quantum algorithms: the quantum approximate optimization algorithm (QAOA) and quantum phase estimation (QPE). Our pipeline integrates several open-source software tools, and leverages recent advances in error-aware unitary gate synthesis, high-fidelity magic state production, and the calculation of correlation surfaces in the surface code. We perform classical simulations of physical Clifford proxy circuits produced by our pipeline, and find that both 5-qubit QAOA and QPE can reach algorithmic break-even with 2517 physical qubits (surface code distance $d=11$) at physical error rates of $p=10^{-3}$, or 1737 physical qubits ($d=9$) at $p=5\times 10^{-4}$. Our work thereby identifies conditions for achieving algorithmic break-even with near-term quantum hardware and paves the way towards an end-to-end compiler for early-fault-tolerant surface code architectures.

quant-pharXiv:2511.20947•ACM/IEEE Design Automation Conference (DAC)•Nov 27, 2025•0 citations

QGPU: Parallel logic in quantum LDPC codes

Boren Gu, Andy Zeyi Liu, Armanda O. Quintavalle +3 more

Quantum error correction is critical to the design and manufacture of scalable quantum computing systems. Recently, there has been growing interest in quantum low-density parity-check codes as a resource-efficient alternative to surface codes. Their adoption is hindered by the difficulty of compiling fault-tolerant logical operations. A key challenge is that logical qubits do not necessarily map to disjoint sets of physical qubits, which limits parallelism. We introduce clustered-cyclic codes, a quantum low-density parity-check code family with finite-size instances such as [[136,8,14]] and [[198,18,10]] that are competitive with state-of-the-art constructions. These codes admit a directly addressable logical basis, enabling highly parallel logical measurement layers. To leverage this structure, we propose parallel product surgery for quantum product codes. Using an auxiliary copy of the data patch and an engineered product-connection structure, the protocol performs many logical Pauli-product measurements in a single surgery round with small, fixed overhead. For clustered-cyclic codes, this yields surface-code-style maximal parallelism: up to k/2 disjoint Pauli-product measurements per round under explicit algebraic conditions. We prove that parallel product surgery preserves the code distance for hypergraph product codes and numerically verify distance preservation for the listed clustered-cyclic instances with k = 8. Finally, for the [[24,8,3]] clustered-cyclic code, treating half of the logical qubits as auxiliaries enables arbitrary parallel CNOTs on disjoint pairs; combined with symmetry-derived operations, these gates generate the full Clifford group fault-tolerantly.

quant-pharXiv:2603.05398•Mar 6, 2026•0 citations

Fast computational primitives for La-cross qLDPC codes

Andrea Di Fini, Tom Hartweg, Laura Pecorari +2 more

Quantum LDPC codes promise to reduce the overhead of fault-tolerant quantum computation, but their practical use requires efficient logical gates, measurements, and access to non-Clifford resources. Here, we develop a complete set of computational primitives for La-cross hypergraph product codes. For a subclass of these codes, we show that seed automorphisms together with fold-transversal gates generate the full logical Clifford group up to Pauli corrections. We further prove that every rank one logical operator admits $D$ pairwise disjoint physical representatives, enabling parallel gauging and a space--time tradeoff for logical measurements. Finally, we construct an addressable surface code interface for injecting externally prepared resource states into selected logical qubits. Together, these results establish La-cross codes as a simple, low-connectivity generalisation of surface code computation, retaining analogous computational primitives while providing a complete Clifford+$T$ instruction set across multiple encoded qubits.

quant-pharXiv:2610.12685•Oct 12, 2026•0 citations
We provide an efficient algorithm to compile quantum circuits for fault-tolerant execution.We target surface codes, which form a two-dimensional grid of logical qubits with nearest-neighbor logical operations.Embedding an input circuit's qubits in surface codes can result in long-range two-qubit operations across the grid.We show how to prepare many long-range Bell pairs on qubits connected by edge-disjoint paths of ancillae in constant depth that can be used to perform these long-range operations.This forms one core part of our edge-disjoint path compilation (EDPC) algorithm, by easily performing many parallel long-range Clifford operations in constant depth.It also allows us to establish a connection between surface code compilation and several well-studied edge-disjoint path problems.Similar techniques allow us to perform non-Clifford single-qubit rotations far from magic state distillation factories.In this case, we can easily find the maximum set of paths by a max-flow reduction, which forms the other major part of EDPC.EDPC has the best asymptotic worst-case performance guarantees on the circuit depth for compiling parallel operations when compared to related compilation methods based on SWAP gates and network coding.EDPC also shows a quadratic depth improvement over sequential Pauli-based compilation for parallel rotations requiring magic resources.We implement EDPC and find significantly improved performance for circuits built from parallel controlled-NOT (CNOT) gates, and for circuits that implement the multicontrolled X gate C k NOT.
High-performance quantum low-density parity-check codes promise substantial reductions in the overhead of fault-tolerant quantum computation, but most constructions require long-range connectivity or qubit shuttling, both of which are difficult to realise in superconducting architectures. Here we introduce a family of quantum low-density parity-check codes that, for the first time, combines planar open-boundary layouts, finite-size advantages over surface codes, and syndrome extraction using only nearest-neighbour gates on a planar grid of qubits with either square or hexagonal connectivity. The resulting circuits achieve optimal constant-depth stabiliser measurement, independent of code size, and naturally remove leakage from the system by exchanging the roles of check and data qubits at each syndrome extraction round. We find finite-size instances such as a [[323,14,15]] code, whose code-efficiency ratio is nearly an order of magnitude larger than that of rotated surface-code patches. At around 40 circuit qubits per logical qubit, the best directional tile-code layouts reduce the per-logical per-round logical error rate by a factor of 100 relative to rotated surface-code memories. These results show that the advantages of quantum low-density parity-check codes can survive compilation into strictly planar nearest-neighbour circuits, bringing low-overhead fault-tolerant memories closer to near-term hardware.
Surface codes are widely considered to be one of the most promising methods for achieving fault-tolerant quantum computation on noisy intermediate-scale quantum (NISQ) computers. One of the computational challenges involved is in transpiling the logical circuit to a form that is compatible with the physical hardware that has limited qubit connectivity. In particular, the goal is to first determine a mapping from the logical qubits in the input circuit to the surface code topology, and then route them via Bell pairs, in a manner that minimizes the total execution time. We refer to this problem as the surface code logical qubit mapping and routing problem. In this work, we formulate the mapping problem as a mixed integer program (MIP) and implement an edge-disjoint path algorithm for routing. In order to handle circuits with a larger number of qubits, we introduce a divide-and-conquer (DC) strategy for scalable mapping. We evaluate our MIP-based mapping approach against structural and random mapping baselines, demonstrating improved performance on both large-scale synthetic circuits and circuits from existing quantum algorithms.
Quantum computing is expected to become a foundational technology for solving problems that exceed the capabilities of classical systems. As quantum algorithms and hardware technologies continue to advance, the need for scalable architectures becomes increasingly clear. Distributed quantum computing offers a promising path forward by interconnecting multiple smaller processors into a larger, more powerful system. However, distributed quantum computing introduces significant circuit depth overhead, as logical operations are typically decomposed into sequential physical procedures that require entanglement generation. These sequential operations limit the reliability of quantum algorithms in the NISQ era due to noise. In this work, we present a compiler that integrates logical-to-physical decomposition with depth-aware rescheduling to reduce the execution cost of distributed quantum circuits. The compiler identifies sequences of logical CNOT gates that share a control or target qubit, reschedules them into parallel instruction groups, and applies decompositions that allow multiple gates to be executed simultaneously using distributed shared entanglement resources. An algorithm is proposed that ensures parallelism is created when possible while keeping logical equivalence and that circuit depth is never increased. Benchmark results demonstrate that the compiler consistently reduces circuit depth for circuits containing inherently sequential CNOT structures, while leaving already-parallel circuits unchanged. These results highlight the value of combining scheduling and hardware-aware decomposition, and establish the compiler as a practical tool for improving the fidelity of distributed quantum computations.
Recent experimental progress in realizing surface code on hardware, including demonstrations of break-even logical memory on devices with up to hundreds of physical qubits, has materially advanced the prospects for fault-tolerant quantum computation. This progress creates urgency for the development of compilation workflows that directly target the forthcoming generation of devices with thousands of physical qubits, for which algorithm execution becomes practical. We develop a pipeline for compiling logical algorithms to physical circuits implementing lattice surgery on the surface code, and use this pipeline to identify the requirements for achieving algorithmic break-even -- where quantum error correction improves the performance of a quantum algorithm -- for two prominent quantum algorithms: the quantum approximate optimization algorithm (QAOA) and quantum phase estimation (QPE). Our pipeline integrates several open-source software tools, and leverages recent advances in error-aware unitary gate synthesis, high-fidelity magic state production, and the calculation of correlation surfaces in the surface code. We perform classical simulations of physical Clifford proxy circuits produced by our pipeline, and find that both 5-qubit QAOA and QPE can reach algorithmic break-even with 2517 physical qubits (surface code distance d=11d=11d=11) at physical error rates of p=10−3p=10^{-3}p=10−3, or 1737 physical qubits (d=9d=9d=9) at p=5×10−4p=5\times 10^{-4}p=5×10−4. Our work thereby identifies conditions for achieving algorithmic break-even with near-term quantum hardware and paves the way towards an end-to-end compiler for early-fault-tolerant surface code architectures.
Quantum error correction is critical to the design and manufacture of scalable quantum computing systems. Recently, there has been growing interest in quantum low-density parity-check codes as a resource-efficient alternative to surface codes. Their adoption is hindered by the difficulty of compiling fault-tolerant logical operations. A key challenge is that logical qubits do not necessarily map to disjoint sets of physical qubits, which limits parallelism. We introduce clustered-cyclic codes, a quantum low-density parity-check code family with finite-size instances such as [[136,8,14]] and [[198,18,10]] that are competitive with state-of-the-art constructions. These codes admit a directly addressable logical basis, enabling highly parallel logical measurement layers. To leverage this structure, we propose parallel product surgery for quantum product codes. Using an auxiliary copy of the data patch and an engineered product-connection structure, the protocol performs many logical Pauli-product measurements in a single surgery round with small, fixed overhead. For clustered-cyclic codes, this yields surface-code-style maximal parallelism: up to k/2 disjoint Pauli-product measurements per round under explicit algebraic conditions. We prove that parallel product surgery preserves the code distance for hypergraph product codes and numerically verify distance preservation for the listed clustered-cyclic instances with k = 8. Finally, for the [[24,8,3]] clustered-cyclic code, treating half of the logical qubits as auxiliaries enables arbitrary parallel CNOTs on disjoint pairs; combined with symmetry-derived operations, these gates generate the full Clifford group fault-tolerantly.
Quantum LDPC codes promise to reduce the overhead of fault-tolerant quantum computation, but their practical use requires efficient logical gates, measurements, and access to non-Clifford resources. Here, we develop a complete set of computational primitives for La-cross hypergraph product codes. For a subclass of these codes, we show that seed automorphisms together with fold-transversal gates generate the full logical Clifford group up to Pauli corrections. We further prove that every rank one logical operator admits DDD pairwise disjoint physical representatives, enabling parallel gauging and a space--time tradeoff for logical measurements. Finally, we construct an addressable surface code interface for injecting externally prepared resource states into selected logical qubits. Together, these results establish La-cross codes as a simple, low-connectivity generalisation of surface code computation, retaining analogous computational primitives while providing a complete Clifford+TTT instruction set across multiple encoded qubits.