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arXiv:2107.01857 · IEEE Transactions on Quantum Engineering

Versatile and Concurrent FPGA-Based Architecture for Practical Quantum Communication Systems

Andrea Stanco, Francesco B. L. Santagiustina, Luca Calderaro, Marco Avesani, Tommaso Bertapelle, Daniele Dequal, Giuseppe Vallone, Paolo Villoresi

Published Jan 1, 2022• 31 citations
arXivHTMLPDF

Abstract

This article presents a hardware and software architecture, which can be used in those systems that implement practical quantum key distribution (QKD) and quantum random-number generation (QRNG) schemes. This architecture fully exploits the capability of a System on a Chip (SoC), which comprehends both a field-programmable gate array (FPGA) and a dual-core CPU unit. By assigning the time-related tasks to the FPGA and the management to the CPU, we built a flexible system with optimized resource sharing on a commercial off-the-shelf (COTS) evaluation board, which includes an SoC. Furthermore, by changing the dataflow direction, the versatile system architecture can be exploited as a QKD transmitter, QKD receiver, and QRNG control-acquiring unit. Finally, we exploited the dual-core functionality and realized a concurrent stream device to implement a practical QKD transmitter, where one core continuously receives fresh data at a sustained rate from an external QRNG source, while the other operates with the FPGA to drive the qubit transmission to the QKD receiver. The system was successfully tested on a long-term run proving its stability and security. This demonstration paves the way toward a more secure QKD implementation, with fully unconditional security as the QKD states are entirely generated by a true random process and not by deterministic expansion algorithms. Eventually, this enables the realization of a standalone quantum transmitter, including both the random numbers and the qubit generation.

DOI
10.1109/tqe.2022.3143997

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This article presents a hardware and software architecture, which can be used in those systems that implement practical quantum key distribution (QKD) and quantum random-number generation (QRNG) schemes. This architecture fully exploits the capability of a System on a Chip (SoC), which comprehends both a field-programmable gate array (FPGA) and a dual-core CPU unit. By assigning the time-related tasks to the FPGA and the management to the CPU, we built a flexible system with optimized resource sharing on a commercial off-the-shelf (COTS) evaluation board, which includes an SoC. Furthermore, by changing the dataflow direction, the versatile system architecture can be exploited as a QKD transmitter, QKD receiver, and QRNG control-acquiring unit. Finally, we exploited the dual-core functionality and realized a concurrent stream device to implement a practical QKD transmitter, where one core continuously receives fresh data at a sustained rate from an external QRNG source, while the other operates with the FPGA to drive the qubit transmission to the QKD receiver. The system was successfully tested on a long-term run proving its stability and security. This demonstration paves the way toward a more secure QKD implementation, with fully unconditional security as the QKD states are entirely generated by a true random process and not by deterministic expansion algorithms. Eventually, this enables the realization of a standalone quantum transmitter, including both the random numbers and the qubit generation.
Abstract This paper presents the equipment and programming design that can be utilized in these frameworks which carries out pragmatic quantum key conveyance (QKD) and quantum arbitrary number age (QRNG). Plans This engineering makes the most of the capacities of the framework on a chip (SoC) that executes Programmable door cluster (FPGA) and double center CPU. Relegating time-bound errands For FPGA and CPU the executives, we have made an adaptable framework with ideal asset designation. A business off-the-rack (COTS) assessment board that incorporates the SoC. Likewise with a change For information stream, the general framework design can be utilized as QKD transmitter, QKD collector. what's more, the control and acknowledgment unit QRNG. At last, we utilized double center execution and saw the synchronization QKD carries out equipment streams to execute stream dispatchers where the bit is continually getting new information. One runs at a decent rate from an outside QRNG source and different sudden spikes in demand for a FPGA Communicating a qubit to a QKD collector. The framework was effectively tried during a long exhibit Its strength and security. This confirmation prepares for a safer execution of QKD. Since QKD states are produced by a totally evident stochastic interaction with genuine outright security Not with explicit augmentation components. At last, it permits us to see a singular amount The transmitter incorporates arbitrary numbers and qubit age.
This thesis work is about the realization of hardware and software systems for Quantum Random Number Generation (QRNG) and Quantum Key Distribution (QKD). Such systems were developed to guarantee a full functionality for a broader investigation of these two cutting edge applications of Quantum Information field. The thesis describes in details both the hardware and the software that were developed for FPGA-CPU board, Time-to-Digital converter (TDC) devices and computers, along with QRNG and QKD specific applications and their results. Randy was the first FPGA-based QRNG device to be developed; it uses a light source attenuated to single-photon level and one single-photon avalanche diode (SPAD). From the sampling of the SPAD electrical signal, the device produces random numbers through dedicated generation protocols and through the Peres unbiasing algorithm in order to maximize the output generation bit rate. Furthermore, the device allows to generate real time random numbers. This feature is used for the time setting of electro-optical components for extending Wheeler’s delayed-choice experiment to space. The same techniques were applied to a second device, LinoSPAD; it combines an FPGA-chip and a CMOS-SPADs array. Moreover, in this device, a TDC improves the photon detection time accuracy. Along with a dedicated post-processing based on Zhou-Bruk algorithm, the TDC allowed to reach a final bit rate equivalent to 300 Mbit/s. As far as QKD systems are concerned, within the collaboration among the University of Padova, the Italian Space Agency (ASI) with the Matera Laser Ranging Observatory (MLRO) and the Chinese Academy of Sciences (CAS) a TDC device management software was developed. The project aim is to realize a quantum cryptographic key exchange between the Chinese satellite Micius and MLRO. The software was designed to manage the entire data acquisition synchronized with UTC time. Furthermore, another software was designed to deal with electro-optomechanical and electro-optical components. The software is aim at the time-variant compensation of the beam angular changes through the optical path. Once again, within a collaboration between ASI and University of Padova, a full free space QKD system over tenths of kilometers was developed. It required the design of various components. This work describes the QKD source along with the dedicated FPGA board design. Such board generates the electrical impulses to control the qubit laser along with the electro-optic phase and intensity modulators.
Our work aims to introduce an FPGA-based electronics architecture designed to enhance the security of quantum key distribution (QKD) networks. The core focus is on integrating a true random number generator (TRNG) IP in an FPGA-based QKD control electronics implemented on Xilinx’s ZYNQ UltraScale+ based FPGA boards. The work presents the challenges in integrating an existing TRNG IP with QKD FPGA design, different bit and timing requirements, the subsequent speed mismatch issues, support for multiple QKD protocols (Coherent One-Way (CoW) and Differential Phase Shift (DPS)) and user-defined QKD implementations. The integrated design also supports external QRNG/TRNG over USB/Ethernet.
Quantum key distribution (QKD) relies on the fundamental principles of quantum mechanics and can theoretically achieve unconditionally secure communication that is provable by information theory. Quantum random number generators, on the other hand, utilize the inherent randomness of quantum phenomena and are capable of generating a truly random entropy source that is unpredictable, unbiased and unrepeatable. These two technologies are crucial for building highly trustworthy and secure communication systems resistant to quantum attacks. However, their large-scale deployment still faces challenges such as system performance optimization, cost control and scale production. Relying on wafer-level fabrication platforms and micro-nanometer processing, integrated photonics technology integrates the core devices of traditional QKD systems (e.g., light source, modulator, and detector) in a single chip at high density. It significantly improves the miniaturization, operational stability and cost-effectiveness of the system, and enhances the intrinsic security, and becomes a key enabling platform to drive QKD and QRNG from laboratory to engineering applications. In this paper, we systematically review the recent breakthroughs of photonic integrated QKD based on different material platforms (SOI/InP/TFLN/Si3N4) in terms of core metrics, such as transmission distance and key rate, as well as the significant breakthroughs of integrated QRNG in terms of random number generation rate and system integration. Finally, the future development direction of this field is discussed and outlooked from the four dimensions of practical security of QKD systems, on-chip implementation of cutting-edge QKD protocols, practical fully-integrated QKD systems, and synergistic optimization of high performance and high integration of integrated QRNG.
Quantum key distribution (QKD) provides a secure and effective way of exchanging cryptographic symmetric keys without the possibility of an eavesdropper being undetected. The transmission and detection of the quantum states at the physical layer is the first step to defining a common source of entropy, where both parties will extract a raw key. Over the last few years, continuous variable quantum key distribution (CV-QKD) protocols have become an attractive technology for QKD, providing a low-cost solution that can be easily integrated with the current optical network devices and infrastructure. Unlike other QKD technologies, a CV protocol requires complex and highly computationally demanding digital signal processing (DSP) operations. In that sense, parallel computation tools such as field programmable gate arrays (FPGAs) represent a key element for the practical implementation of this quantum technology and to scale its performance in terms of distance and secret key rate indicators. This work presents an FPGA-based implementation of the physical layer of a CV-QKD transmitter. The proposed architecture and employed protocols are described, and hardware implementation aspects are discussed, including resource occupation analysis, configuration parameters, and timing issues.