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arXiv:1909.12421 · IEEE Transactions on Applied Superconductivity

JOINUS: A User-Friendly Open-Source Software to Simulate Digital Superconductor Circuits

Sasan Razmkhah, Pascal Febvre

Published Feb 27, 2020• 13 citations
arXivHTMLPDF

Abstract

Single-flux-quantum-based circuits are the subjects of renewed attention due to their high speed and very high energy efficiency. However, the need of cryogenic temperature, the complex physics of Josephson junctions, and the lack of proper electronic design automation (EDA) tools causes slow progress in the field of superconducting electronics. In this article, we introduce a new open-source program named JOsephson INterface Utility Software (JOINUS) that incorporates simulation program with integrated circuit emphasis (SPICE)-based simulator engines, improved physical models, and several powerful built-in routines. JOINUS is based on a user-friendly environment available on Linux, MacOS, and Windows platforms to simplify the design and analysis of superconducting digital circuits.

DOI
10.1109/tasc.2020.2976600

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Single-flux-quantum-based circuits are the subjects of renewed attention due to their high speed and very high energy efficiency. However, the need of cryogenic temperature, the complex physics of Josephson junctions, and the lack of proper electronic design automation (EDA) tools causes slow progress in the field of superconducting electronics. In this article, we introduce a new open-source program named JOsephson INterface Utility Software (JOINUS) that incorporates simulation program with integrated circuit emphasis (SPICE)-based simulator engines, improved physical models, and several powerful built-in routines. JOINUS is based on a user-friendly environment available on Linux, MacOS, and Windows platforms to simplify the design and analysis of superconducting digital circuits.
Advancement in the field of superconductor circuits requires better designing tools and computer-aided programs. The JOINUS program is developed as part of the ColdFlux/SuperTools project. It features a user-friendly environment with several useful tools to design superconductor circuits based on Josephson junctions. The program can work with different Josephson simulator engines and embeds several new functionalities.We pursue two main goals to develop the software with a multi-platform capability. The first goal is to provide a graphical user interface environment that is easy to use and can be handled quickly with a simple user guide and some helpful examples. That also includes the automation of some tasks to perform in the course of a design sequence. The objective is to make newcomers to the field of superconducting electronics more interested and inclined to start using and designing simple digital circuits in a short time and a simple way. The second goal is to improve already established models that are sometimes inaccurate or even inappropriate. The software is not just a user-friendly interface, it also provides improved models and many new functionalities.
Superconducting electronics provide us with cryogenic digital circuits that can rival established technologies in performance and energy consumption. Today, the lack of tools for the design of large-scale integrated superconducting circuits is a major obstacle to their deployment. Few research institutions and companies have contributed to making such tools available. This review focuses on methods, algorithms, and open-source design tools for logic synthesis of superconducting circuits in two major families: single-flux quantum (SFQ) circuits and adiabatic quantum flux parametron (AQFP).
Abstract Superconducting integrated circuits have long been completely handcrafted or at best designed with a loose collection of tools that require manual manipulation of data and design transfer between tools. Electronic Design Automation (EDA) software development requires significant investment of resources to track the evolution of integrated circuit fabrication processes, which has only been possible commercially for highly successful semiconductor integrated circuit processes. The IARPA SuperTools project which started in 2017 is the largest known investment to date made in superconducting EDA tool development. SuperTools is divided into two main categories: high-level tools for the synthesis of digital logic circuits, clock networks and placed-and-routed layouts for systems such as processors with millions of logic gates; and physical-level tools for the design, simulation, optimisation, verification, layout and parameter extraction of devices and digital logic cells with the inclusion of fabrication process simulation. In this paper the modules developed for the ColdFlux project under SuperTools are discussed from device modelling to chip tape-out. Progress on parameter extraction tools is highlighted.
In five and a half years, the ColdFlux project under the IARPA SuperTools program pushed the boundaries of digital and analog superconductor electronic design automation (S-EDA) tools. The SuperTools program demanded significant beyond-state-of-the-art deliverables in four main areas: RTL synthesis, architectures, and verification; analog design and layout synthesis; physical design and test; and technology CAD and cell library design. Through the work of academic groups scattered over four continents, the ColdFlux effort forged into a powerful set of open-source and commercial S-EDA tools unlike any before, rivaled only by a commercial toolchain from Synopsys under the same SuperTools umbrella. We present an overview of the tools from where we started to the eventual project deliverables. These include powerful simulation and extraction engines, magnetic field and flux trapping analysis, advanced clocking methods, multi-chip interface extraction and verification, unified multi-layer design-rule compliant track blocks for automated place and route of both rapid single flux quantum (RSFQ) and adiabatic quantum-flux-parametron (AQFP) cells, models and tools for validation and test, multi-bit single flux quantum (SFQ) cells, architecture innovations for full CPU designs and more. Comprehensive cell libraries and a process design kit (PDK) were developed with the ColdFlux tools. The AQFP cell library features a logically rich collection of 80+ cells, including 3- and 5-input logic gates, signal-driving boosters, and refined RSFQ-to-AQFP interfaces, while the RSFQ library has 30+ cells. Finally, we discuss how the full toolchain enables and enhances the superconductor IC design process.
New tools have been created to allow a superconducting design flow for schematic design, verification, and optimization. These tools integrate with the Cadence design environment. In single flux quantum superconducting electronics, individual component values, such as wire inductances, Josephson junction critical currents, and bias currents, must be optimized to allow for maximum deviance from the designer value, which is also known as the device margin. One tool is used to create a description of the proper circuit behavior. Included with this tool is the ability to automatically create the description from a Cadence netlist. The other tool is an automated device margin circuit schematic verification and optimization tool, which widens device margins while maintaining proper circuit behavior derived from the first tool. Additionally, this optimization tool can automatically correct the circuit schematic using the proper circuit behavior description. In this paper, the functionality of the language used to create the description of the proper circuit behavior is presented. Several circuits are then verified and optimized based on their correct behavior.
The lack of dense, fast, energy efficient memory has been the main detractor for multiple superconducting digital projects in the past. Recently, fundamental physics research in superconductor-ferromagnet thin-film tunnel structures created a new opportunity to solve this long-standing problem. Superconductivity and ferromagnetism, two deeply antagonistic electronic properties, can co-exist in form of Magnetic Josephson Junctions (MJJs). The superconducting-ferromagnetic MJJs are electrically compatible with traditional superconductor-insulator-superconductor (SIS) Josephson junctions (JJs) used for digital energy-efficient single flux quantum (eSFQ/ERSFQ) circuits. Both MJJ and JJ circuits have similar fabrication process and can be integrated on a single chip. As a result, a combination of MJJs and JJs can be used to form addressable memory cells, energy-efficient memory periphery circuits and programmable logic elements. In this paper, we present the test results of superconductor-insulator-ferromagnet-superconductor (SIFS) MJJs showing their applicability for superconducting spintronic memory and digital circuits.