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arXiv:1605.01351 · Physical Review Letters

Demonstration of Weight-Four Parity Measurements in the Surface Code Architecture

Maika Takita, Antonio D. Corcoles, Easwar Magesan, Baleegh Abdo, Markus Brink, Andrew W. Cross, Jerry M. Chow, Jay Gambetta

Published Nov 18, 2016• 198 citations
arXivHTMLPDF

Abstract

We present parity measurements on a five-qubit lattice with connectivity amenable to the surface code quantum error correction architecture. Using all-microwave controls of superconducting qubits coupled via resonators, we encode the parities of four data qubit states in either the X or the Z basis. Given the connectivity of the lattice, we perform a full characterization of the static Z interactions within the set of five qubits, as well as dynamical Z interactions brought along by single- and two-qubit microwave drives. The parity measurements are significantly improved by modifying the microwave two-qubit gates to dynamically remove nonideal Z errors.

DOI
10.1103/physrevlett.117.210505

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We present parity measurements on a five-qubit lattice with connectivity amenable to the surface code quantum error correction architecture. Using all-microwave controls of superconducting qubits coupled via resonators, we encode the parities of four data qubit states in either the X or the Z basis. Given the connectivity of the lattice, we perform a full characterization of the static Z interactions within the set of five qubits, as well as dynamical Z interactions brought along by single- and two-qubit microwave drives. The parity measurements are significantly improved by modifying the microwave two-qubit gates to dynamically remove nonideal Z errors.
The ability to detect and deal with errors when manipulating quantum systems is a fundamental requirement for fault-tolerant quantum computing. Unlike classical bits that are subject to only digital bit-flip errors, quantum bits are susceptible to a much larger spectrum of errors, for which any complete quantum error-correcting code must account. Whilst classical bit-flip detection can be realized via a linear array of qubits, a general fault-tolerant quantum error-correcting code requires extending into a higher-dimensional lattice. Here we present a quantum error detection protocol on a two-by-two planar lattice of superconducting qubits. The protocol detects an arbitrary quantum error on an encoded two-qubit entangled state via quantum non-demolition parity measurements on another pair of error syndrome qubits. This result represents a building block towards larger lattices amenable to fault-tolerant quantum error correction architectures such as the surface code.
Quantum error correction will be a necessary component towards realizing scalable quantum computers with physical qubits. Theoretically, it is possible to perform arbitrarily long computations if the error rate is below a threshold value. The two-dimensional surface code permits relatively high fault-tolerant thresholds at the ~1% level, and only requires a latticed network of qubits with nearest-neighbor interactions. Superconducting qubits have continued to steadily improve in coherence, gate, and readout fidelities, to become a leading candidate for implementation into larger quantum networks. Here we describe characterization experiments and calibration of a system of four superconducting qubits arranged in a planar lattice, amenable to the surface code. Insights into the particular qubit design and comparison between simulated parameters and experimentally determined parameters are given. Single- and two-qubit gate tune-up procedures are described and results for simultaneously benchmarking pairs of two-qubit gates are given. All controls are eventually used for an arbitrary error detection protocol described in separate work [Corcoles et al., Nature Communications, 6, 2015].
A remarkable characteristic of quantum computing is the potential for reliable computation despite faulty qubits. This can be achieved through quantum error correction, which is typically implemented by repeatedly applying static syndrome checks, permitting correction of logical information. Recently, the development of time-dynamic approaches to error correction has enabled different codes and implementations that do not rely on static syndrome measurements. Here we experimentally demonstrate three time-dynamic implementations of the surface code, each offering a distinct solution to hardware design challenges faced by surface code realizations. First, we embed the surface code on a hexagonal lattice, reducing the necessary couplings per qubit from four to three. Second, we walk a surface code, swapping the role of data and measure qubits each round, achieving error correction with built-in removal of accumulated non-computational errors. Finally, we realize the surface code using iSWAP gates instead of the traditional CNOT, extending the set of viable gates for error correction without additional overhead. We measure the error suppression factor when scaling from distance-3 to distance-5 codes of Λ35,hex = 2.15(2), Λ35,walk = 1.69(6) and Λ35,iSWAP = 1.56(2), achieving state-of-the-art error suppression for each. Our work demonstrates that dynamic circuit approaches meet the demands for fault tolerance and enable alternative strategies for scalable hardware design. Typical quantum error correcting codes assign fixed roles to the underlying physical qubits. Now the performance benefits of alternative, dynamic error correction schemes have been demonstrated on a superconducting quantum processor.
Recent advances in coherent spin shuttling have made sparse semiconductor spin qubit arrays an appealing solid-state platform to realize quantum processors. The dynamic and long-range connectivity enabled by shuttling is also essential for many quantum error-correction (QEC) schemes. Here, we demonstrate a silicon spin-qubit device that comprises a shuttling bus for coherently transporting qubits that can interact at four isolated locations we call bus stops. We dynamically populate the array and tune all single- and two-qubit operations using shuttling and quantum non-demolition (QND) spin measurements, without access to charge sensing in most of the device. We achieve universal control of the effective five-qubit processor and select the connectivity required to form a surface-code stabilizer plaquette that supports X- and Z-type parity checks up to weight-four. We use the parity checks to generate multi-qubit entanglement between all qubit combinations in the array and report the genuine entanglement of a five-qubit Greenberger-Horne-Zeilinger (GHZ) state, constituting the largest such state ever constructed with gate-defined semiconductor spins. This work opens immediate opportunities to pursue QEC experiments with spin qubits, and the protocols developed here lay the groundwork for the modular calibration and operation of sparse spin qubit arrays.
We present a concept for performing direct parity measurements on three or more qubits in microwave structures with superconducting resonators coupled to Josephson-junction qubits. We write the quantum-eraser conditions that must be fulfilled for the parity measurements as requirements for the scattering phase shift of our microwave structure. We show that these conditions can be fulfilled with present-day devices. We present one particular scheme, implemented with two-dimensional cavity techniques, in which each qubit should be coupled equally to two different microwave cavities. The magnitudes of the couplings that are needed are in the range that has been achieved in current experiments. A quantum calculation indicates that the measurement is optimal if the scattering signal can be measured with near single-photon sensitivity. A comparison with an extension of a related proposal from cavity optics is presented. We present a second scheme, for which a scalable implementation of the four-qubit parities of the surface quantum error correction code can be envisioned. It uses three-dimensional cavity structures, using cavity symmetries to achieve the necessary multiple resonant modes within a single resonant structure.
Multiqubit parity measurements are essential to quantum error correction. Current realizations of these measurements often rely on ancilla qubits, a method that is sensitive to faulty two-qubit gates and that requires notable experimental overhead. We propose a hardware-efficient multiqubit parity measurement exploiting the bifurcation dynamics of a parametrically driven nonlinear oscillator. This approach takes advantage of the resonator's parametric oscillation threshold, which depends on the joint parity of dispersively coupled qubits, leading to high-amplitude oscillations for one parity subspace and no oscillation for the other. We present analytical and numerical results for two- and four-qubit parity measurements, with high-fidelity readout preserving the parity eigenpaces. Moreover, we discuss a possible realization that can be readily implemented with the current circuit quantum electrodynamics (QED) experimental toolbox. These results could lead to substantial simplifications in the experimental implementation of quantum error correction and notably of the surface code.