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arXiv:quant-ph/0411011

Efficient tests for experimental quantum gates

Holger Friedrich Hofmann

Published Nov 2, 2004• 0 citations
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Abstract

Realistic quantum gates operate at non-vanishing noise levels. Therefore, it is necessary to evaluate the performance of each device according to some experimentally observable criteria of device performance. In this presentation, the characteristic properties of quantum operations are discussed and efficient measurement strategies are proposed.

DOI
10.48550/arxiv.quant-ph/0411011

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Realistic quantum gates operate at non-vanishing noise levels. Therefore, it is necessary to evaluate the performance of each device according to some experimentally observable criteria of device performance. In this presentation, the characteristic properties of quantum operations are discussed and efficient measurement strategies are proposed.
Quantum logic gates can perform calculations much more efficiently than their classical counterparts. However, the level of control needed to obtain a reliable quantum operation is correspondingly higher. In order to evaluate the performance of experimental quantum gates, it is therefore necessary to identify the essential features that indicate quantum coherent operation. In this paper, we show that an efficient characterization of an experimental device can be obtained by investigating the classical logic operations on a pair of complementary basis sets. It is then possible to obtain reliable predictions about the quantum coherent operations of the gate such as entanglement generation and Bell state discrimination even without performing these operations directly.
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Using near-term quantum computers to achieve a quantum advantage requires efficient strategies to improve the performance of the noisy quantum devices presently available. We develop and experimentally validate two efficient error mitigation protocols named ``Noiseless Output Extrapolation" and ``Pauli Error Cancellation" that can drastically enhance the performance of quantum circuits composed of noisy cycles of gates. By combining popular mitigation strategies such as probabilistic error cancellation and noise amplification with efficient noise reconstruction methods, our protocols can mitigate a wide range of noise processes that do not satisfy the assumptions underlying existing mitigation protocols, including non-local and gate-dependent processes. We test our protocols on a four-qubit superconducting processor at the Advanced Quantum Testbed. We observe significant improvements in the performance of both structured and random circuits, with up to 86% improvement in variation distance over the unmitigated outputs. Our experiments demonstrate the effectiveness of our protocols, as well as their practicality for current hardware platforms.
The Berkeley gate is a high-performance, two-qubit entangling operation with particular potential for quantum error correction and fault-tolerant protocols. However, harnessing this potential on current noisy intermediate-scale quantum (NISQ) processors, requires efficient compilation and robust performance under realistic noise conditions. In this work, we demonstrate a hardware-efficient implementation of the Berkeley gate on a superconducting quantum processor. Using quantum process tomography (QPT), we experimentally characterize its performance and benchmark it against a noiseless quantum simulator to evaluate its practical reliability in the NISQ era. Experimental measurements confirm the gate's correct logical action, producing the target partially entangled state with a subspace confinement probability of [Formula: see text] on real quantum hardware compared to 100% in quantum simulation. Results from QPT experiments show a simulated process fidelity of [Formula: see text], while the experimental process fidelity on hardware is [Formula: see text]. The observed discrepancy is analyzed in the context of device-specific noise sources, including qubit relaxation, dephasing, and state preparation and measurement (SPAM) errors. Our work provides a concrete fidelity benchmark for the Berkeley gate on superconducting hardware and quantify the impact of realistic noise on a non-trivial two-qubit operation, supporting its use in near-term algorithmic and error-correction applications.