Quantum computers are analog devices; thus they are highly susceptible to accumulative errors arising from classical control electronics. Fast operation—as necessitated by decoherence—makes gating errors very likely. In most current designs for scalable quantum computers, it is not possible to satisfy both the requirements of low decoherence errors and low gating errors. Here, we introduce a hardware-based technique for pseudo-digital gate operation. We perform self-consistent simulations of semiconductor quantum dots, finding that pseudo-digital techniques reduce operational error rates by more than two orders of magnitude, thus facilitating fast operation.
Quantum computers are analog devices; thus they are highly susceptible to accumulative errors arising from classical control electronics. Fast operation—as necessitated by decoherence—makes gating errors very likely. In most current designs for scalable quantum computers, it is not possible to satisfy both the requirements of low decoherence errors and low gating errors. Here, we introduce a hardware-based technique for pseudo-digital gate operation. We perform self-consistent simulations of semiconductor quantum dots, finding that pseudo-digital techniques reduce operational error rates by more than two orders of magnitude, thus facilitating fast operation.
Since the mid-20th century it has been understood that a general-purpose quan- tum computer would be able to efficiently solve problems that will forever be out-of-reach for conventional computers. Since then, many quantum algorithms have been developed with applications in a wide range of domains including cryptography, simulations, machine learning and data analysis. While this has resulted in substantial attention being paid to the development of quantum com- puters, the best architectures to use in their fabrication is not yet clear. Semiconductor quantum dot devices are a particularly promising candidate for use in quantum computing architectures, as it is anticipated that once the funda- mental building blocks are implemented, they might be massively scalable using the existing lithography techniques of the semiconductor industry. So far, how- ever, it is not yet clear how best to implement the high-fidelity gates required for general-purpose quantum computation. In this thesis, we present and characterise novel theoretical proposals for fast, simple and high-fidelity two-qubit gates using magnetic (exchange) coupling for specific semiconductor quantum dot qubits; namely, the singlet-triplet and resonant-exchange qubits. These two-qubit operations are simple enough that it is feasible for them to be implemented in experiments of the near future. Success- ful implementations would significantly extend the experimentally demonstrable frontier of semi-conductor quantum dot devices as relevant to their use in uni- versal quantum computing architectures. We also develop simple parameter estimation schemes by which it is possible to substantially mitigate the dominant sources of error for our proposed gates; namely, low-frequency charge and magnetic noise. We develop the techniques in the context of pseudo-static magnetic field gradient fluctuations in singlet- triplet qubits, and demonstrate that these techniques lead to a several orders of magnitude improvement in single-qubit coherence times. With minimal effort this could be ported to other qubit architectures.
Quantum simulation and computing traditionally has been based on two main paradigms, namely, digital and analog. In the digital paradigm, usually single and two-qubit gates (where qubit is an acronym for quantum bit) are employed as building blocks for scalable, universal quantum computing, although errors add up fast and error correction will be ultimately needed for scaling up. In the analog paradigm, large analog blocks are normally employed for a unitary dynamics that carries out the computation, enabling quantum operations on many qubits with reduced errors, but with the drawback of a limited choice of evolutions and lack of universality. In the past decade, a new paradigm has emerged, showing interesting possibilities for quantum simulation and computing in the near and mid term. This is the paradigm of digital-analog quantum technologies, which proposes to combine the best of both paradigms: large analog blocks, provided by native interactions of the employed quantum platform, enabling scalability, combined with digital gates, allowing for more versatility and, ultimately, universality. In this Perspective, I give an overview of the evolution of the field along the past decade, and an outlook for its future possibilities.
Commercially-relevant quantum computers will require large numbers of high-performing qubits that can be manufactured, integrated, and controlled at scale. Silicon exchange-only (EO) qubits are a strong candidate modality due to their control-signal simplicity and compatibility with advanced semiconductor manufacturing, but questions remain around the achievability of sufficiently low noise and a scalable control and wiring solution. Here we introduce a quantum processing unit composed of a custom-designed cryogenic CMOS controller, a novel high-density superconducting ribbon cable, and a low-noise EO qubit device. The quantum chip features a three-rail array of 54 exchange-coupled quantum dots, configurable to host up to 18 EO qubits. We integrate and use these components to demonstrate qubit performance for both single-qubit and entangling operations that advances the EO state of the art by an order of magnitude. We further validate this system by implementing a distance-5 repetition code and a quantum error detecting code then make detailed comparisons with simulations. Our approach facilitates a utility-scale quantum computer with manageable operational and capital requirements.
Analog quantum simulation has been proposed as an efficient approach for
probing classically intractable many-body physics. In contrast to digital,
gate-based quantum simulation, the analog approach involves configuring the
quantum hardware to directly mimic the physics of the target system. This
reduces the level of control required and can offer a degree of inherent
robustness, but it comes at the cost that known error-handling techniques may
be inapplicable. Accumulation of error is thus a major challenge facing
medium-scale and large-scale analog quantum simulation with current and
near-term noisy quantum (NISQ) devices. Here we propose a hybrid error
mitigation scheme that can suppress general local Markovian noise in analog
quantum simulators. We employ stochastic error mitigation for physical noise
and use Richardson extrapolation to compensate for model estimation error. We
numerically test the error mitigation scheme for an Ising-type Hamiltonian with
energy relaxation and dephasing noise, and show an improvement of simulation
accuracy by two orders. We assess the resource cost of our error mitigation
scheme and conclude that analog quantum simulation at scale is feasible with
NISQ hardware.
Abstract Quantum computing1—the processing of information according to the fundamental laws of physics—offers a means to solve efficiently a small but significant set of classically intractable problems. Quantum computers are based on the controlled manipulation of entangled quantum states, which are extremely sensitive to noise and imprecision; active correction of errors must therefore be implemented without causing loss of coherence. Quantum error-correction theory2, 3, 4, 5, 6, 7, 8, 9 has made great progress in this regard, by predicting error-correcting ‘codeword’ quantum states. But the coding is inefficient and requires many quantum bits10, 11, 12, which results in physically unwieldy fault-tolerant quantum circuits10, 11, 12, 13, 14, 15, 16, 17, 18. Here I report a general technique for circumventing the trade-off between the achieved noise tolerance and the scale-up in computer size that is required to realize the error correction. I adapt the recovery operation (the process by which noise is suppressed through error detection and correction) to simultaneously correct errors and perform a useful measurement that drives the computation. The result is that a quantum computer need be only an order of magnitude larger than the logic device contained within it. For example, the physical scale-up factor10, 11 required to factorize a thousand-digit number is reduced from 1, 500 to 22, while preserving the original tolerated gate error rate (10−5) and memory noise per bit (10−7). The difficulty of realizing a useful quantum computer is therefore significantly reduced.