Challenges
Datasets
Workspaces
Papers
Discussions
Leaderboard
Log inSign up
Challenges
Datasets
Workspaces
Papers
Discussions
Leaderboard
Blog
Job Board
Q3AS

© 2026 Aqora Quantum S.A.S.

TermsPrivacyLegal Notice

arXiv:quant-ph/0205050 · Physical Review A

Implementation of quantum maps by programmable quantum processors

Mark S. Hillery, Mário Ziman, Vladimír Bužek

Published Oct 4, 2002• 40 citations
arXivHTMLPDF

Abstract

A quantum processor is a device with a data register and a program register. The input to the program register determines the operation, which is a completely positive linear map, that will be performed on the state in the data register. We develop a mathematical description for these devices, and apply it to several different examples of processors. The problem of finding a processor that will be able to implement a given set of mappings is also examined, and it is shown that, while it is possible to design a finite processor to realize the phase-damping channel, it is not possible to do so for the amplitude-damping channel.

DOI
10.1103/physreva.66.042302

Related papers

REALIZATION OF UNITARY MAPS VIA PROBABILISTIC PROGRAMMABLE QUANTUM PROCESSORS

Mário Ziman, Vladimír Bužek

We analyze probabilistic realizations of programmable quantum processors that allow us to realize unitary operations on qubits as well as on qudits. Programmable processors are composed of two inputs — the data register and the program register. In the input state of the program register information about the operation that is supposed to be performed on the data is encoded. At the output of the probabilistic processor a measurement over the program register is performed. An intrinsic property of probabilistic processors is that they sometimes fail, but we know when this happens. We present a complete analysis of two processors: (1) The so-called [Formula: see text] processor that is based on a simple controlled-NOT gate. (2) The so-called [Formula: see text] processor that utilizes the quantum-information-distributor circuit.

International Journal of Quantum Information•Dec 1, 2003•5 citations

Programmable Quantum Gate Arrays

Mark S. Hillery, Vladimír Bužek, Mário Ziman

We present a probabilistic quantum processor for qubits. The processor itself is represented by a fixed array of gates. The input of the processor is constituted by two registers. In the program register the set of instructions (program) is encoded. This program is applied to the data register. The processor we present can perform any operation on a single qubit with a certain probability. If the operation is unitary, the probability is in general 1/4, but for more restricted sets of operators the probability can be higher.

Fortschritte der Physik•Oct 1, 2001•16 citations

Programmable Quantum Processors: Equivalence and Learning

Jaroslav Pavličko

In the first part of the work, the equivalence of quantum deterministic and probabilistic processors was investigated. A programmable quantum processor is a device able to transform input data states in a desired way. Deterministic equivalence as well as three types of probabilistic equivalences - strong, weak, and structural - were defined. Necessary and sufficient conditions for deterministic and structural equivalence of unitarily related processors were discovered. Equivalence of deterministic SWAP processor for two-dimensional data and two-dimensional program space was completely solved. It was found that spans of operators of structurally equivalent processors are identical. Relations between types of individual equivalences were also examined. In the second part, robustness of probabilistic storing and retrieval device (PSAR), originally optimized for implementing a phase gate, to noise was examined - specifically to depolarization and phase damping. In the case of a depolarizing channel mixed with a unitary channel, the device implements noisy channel with the probability that decreases with an increasing number of times the given channel is applied. In the case of the phase damping channel, the device implements noisy channel with the same probability as the original PSAR device optimized for phase gate. Concrete implementations - through the Vidal-Masanes-Cirac scheme and virtual qudit - were examined. Vidal-Masanes-Cirac gives the same result for both noisy channels which is better than the result from PSAR. Implementation through virtual qudit for depolarization yields worse probability of successful measurement than Vidal-Masanes-Cirac. However, it is still better than the probability for PSAR. Probability of successful measurement obtained for phase damping implemented through virtual qudit is the same as for Vidal-Masanes-Cirac and PSAR.

arXiv:2411.02289•Nov 4, 2024•0 citations

Programmability of covariant quantum channels

Martina Gschwendtner, Andreas Blühm, Andreas Winter

A programmable quantum processor uses the states of a program register to specify one element of a set of quantum channels which is applied to an input register. It is well-known that such a device is impossible with a finite-dimensional program register for any set that contains infinitely many unitary quantum channels (Nielsen and Chuang's No-Programming Theorem ), meaning that a universal programmable quantum processor does not exist. The situation changes if the system has symmetries. Indeed, here we consider group-covariant channels. If the group acts irreducibly on the channel input, these channels can be implemented exactly by a programmable quantum processor with finite program dimension (via teleportation simulation , which uses the Choi-Jamiolkowski state of the channel as a program). Moreover, by leveraging the representation theory of the symmetry group action, we show how to remove redundancy in the program and prove that the resulting program register has minimum Hilbert space dimension. Furthermore, we provide upper and lower bounds on the program register dimension of a processor implementing all group-covariant channels approximately.

arXiv:2012.00717•Quantum•Jun 29, 2021•16 citations

UNIVERSAL HYBRID QUANTUM PROCESSORS

Alexander Yu. Vlasov

A quantum processor (the programmable gate array) is a quantum network with a ˇxed structure. A space of states is represented as tensor product of data and program registers. Different unitary operations with the data register correspond to ®loaded ¯ programs without any changing or ®tuning¯ of network itself. Due to such property and undesirability of entanglement between program and data registers, universality of quantum processors is subject of rather strong restrictions. Universal ®stochastic¯ quantum gate arrays were developed by different authors. It was also proved, that ®deterministic¯ quantum processors with ˇnite-dimensional space of states may be universal only in approximate sense. In the present paper it is shown that, using hybrid system with continuous and discrete quantum variables, it is possible to suggest a design of strictly universal quantum processors. It is also shown that ®deterministic ¯ limit of speciˇc programmable ®stochastic ¯ U(1) gates (probability of success becomes unit for inˇnite program register), discussed by other authors, may be essentially the same kind of hybrid quantum systems used here.

•Jan 1, 2003•6 citations

Probabilistic implementation of universal quantum processors

Mark S. Hillery, Vladimír Bužek, Mário Ziman

We present a probabilistic quantum processor for qudits on a single qudit of dimension N. The processor itself is represented by a fixed array of gates. The input of the processor consists of two registers. In the program register the set of instructions (program) is encoded. This program is applied to the data register. The processor can perform any operation on a single qudit of dimension N with a certain probability. For a general unitary operation, the probability is ${1/N}^{2},$ but for more restricted sets of operators the probability can be higher. In fact, this probability can be independent of the dimension of the qudit Hilbert space of the qudit under some conditions.

arXiv:quant-ph/0106088•Physical Review A•Jan 3, 2002•79 citations
A quantum processor is a device with a data register and a program register. The input to the program register determines the operation, which is a completely positive linear map, that will be performed on the state in the data register. We develop a mathematical description for these devices, and apply it to several different examples of processors. The problem of finding a processor that will be able to implement a given set of mappings is also examined, and it is shown that, while it is possible to design a finite processor to realize the phase-damping channel, it is not possible to do so for the amplitude-damping channel.
We analyze probabilistic realizations of programmable quantum processors that allow us to realize unitary operations on qubits as well as on qudits. Programmable processors are composed of two inputs — the data register and the program register. In the input state of the program register information about the operation that is supposed to be performed on the data is encoded. At the output of the probabilistic processor a measurement over the program register is performed. An intrinsic property of probabilistic processors is that they sometimes fail, but we know when this happens. We present a complete analysis of two processors: (1) The so-called [Formula: see text] processor that is based on a simple controlled-NOT gate. (2) The so-called [Formula: see text] processor that utilizes the quantum-information-distributor circuit.
We present a probabilistic quantum processor for qubits. The processor itself is represented by a fixed array of gates. The input of the processor is constituted by two registers. In the program register the set of instructions (program) is encoded. This program is applied to the data register. The processor we present can perform any operation on a single qubit with a certain probability. If the operation is unitary, the probability is in general 1/4, but for more restricted sets of operators the probability can be higher.
In the first part of the work, the equivalence of quantum deterministic and probabilistic processors was investigated. A programmable quantum processor is a device able to transform input data states in a desired way. Deterministic equivalence as well as three types of probabilistic equivalences - strong, weak, and structural - were defined. Necessary and sufficient conditions for deterministic and structural equivalence of unitarily related processors were discovered. Equivalence of deterministic SWAP processor for two-dimensional data and two-dimensional program space was completely solved. It was found that spans of operators of structurally equivalent processors are identical. Relations between types of individual equivalences were also examined. In the second part, robustness of probabilistic storing and retrieval device (PSAR), originally optimized for implementing a phase gate, to noise was examined - specifically to depolarization and phase damping. In the case of a depolarizing channel mixed with a unitary channel, the device implements noisy channel with the probability that decreases with an increasing number of times the given channel is applied. In the case of the phase damping channel, the device implements noisy channel with the same probability as the original PSAR device optimized for phase gate. Concrete implementations - through the Vidal-Masanes-Cirac scheme and virtual qudit - were examined. Vidal-Masanes-Cirac gives the same result for both noisy channels which is better than the result from PSAR. Implementation through virtual qudit for depolarization yields worse probability of successful measurement than Vidal-Masanes-Cirac. However, it is still better than the probability for PSAR. Probability of successful measurement obtained for phase damping implemented through virtual qudit is the same as for Vidal-Masanes-Cirac and PSAR.
A programmable quantum processor uses the states of a program register to specify one element of a set of quantum channels which is applied to an input register. It is well-known that such a device is impossible with a finite-dimensional program register for any set that contains infinitely many unitary quantum channels (Nielsen and Chuang's No-Programming Theorem ), meaning that a universal programmable quantum processor does not exist. The situation changes if the system has symmetries. Indeed, here we consider group-covariant channels. If the group acts irreducibly on the channel input, these channels can be implemented exactly by a programmable quantum processor with finite program dimension (via teleportation simulation , which uses the Choi-Jamiolkowski state of the channel as a program). Moreover, by leveraging the representation theory of the symmetry group action, we show how to remove redundancy in the program and prove that the resulting program register has minimum Hilbert space dimension. Furthermore, we provide upper and lower bounds on the program register dimension of a processor implementing all group-covariant channels approximately.
A quantum processor (the programmable gate array) is a quantum network with a ˇxed structure. A space of states is represented as tensor product of data and program registers. Different unitary operations with the data register correspond to ®loaded ¯ programs without any changing or ®tuning¯ of network itself. Due to such property and undesirability of entanglement between program and data registers, universality of quantum processors is subject of rather strong restrictions. Universal ®stochastic¯ quantum gate arrays were developed by different authors. It was also proved, that ®deterministic¯ quantum processors with ˇnite-dimensional space of states may be universal only in approximate sense. In the present paper it is shown that, using hybrid system with continuous and discrete quantum variables, it is possible to suggest a design of strictly universal quantum processors. It is also shown that ®deterministic ¯ limit of speciˇc programmable ®stochastic ¯ U(1) gates (probability of success becomes unit for inˇnite program register), discussed by other authors, may be essentially the same kind of hybrid quantum systems used here.
We present a probabilistic quantum processor for qudits on a single qudit of dimension N. The processor itself is represented by a fixed array of gates. The input of the processor consists of two registers. In the program register the set of instructions (program) is encoded. This program is applied to the data register. The processor can perform any operation on a single qudit of dimension N with a certain probability. For a general unitary operation, the probability is 1/N2,{1/N}^{2},1/N2, but for more restricted sets of operators the probability can be higher. In fact, this probability can be independent of the dimension of the qudit Hilbert space of the qudit under some conditions.