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China Communications

Construction of LDPC Codes for the Layered Decoding Algorithm

Wang, Dong, Mingke, Chen, Jin Jin, Ye, ■ Xiang, Haige

Published Jan 1, 2012• 1 citation
OpenAlex

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A QC-LDPC construction algorithm for increasing the throughput of layered decoders

Jianjun Zhang, Mingke Dong, Ye Jin

Pipelined layered decoder (PLD) of quasi-cyclic low-density parity-check (QC-LDPC) codes is one of most popular high-throughput decoder in modern communication systems. However, the traditional QC-LDPC codes are not suitable for PLD and lead to memory access conflict problems (MACPs) that reduce the throughput of PLD. Therefore, an efficient layered block progressive edge-growth (EL-BPEG) algorithm is proposed to construct a class of QC-LDPC codes that can avoid MACPs and increase throughput. EL-BPEG appends check nodes, rather than variable nodes, progressively into Tanner Graph with strict concentrated check-node degrees. And it establishes edges according to the latency of the pipelines in PLD; thus, all idle clocks can be eliminated for the PLD with EL-BPEG codes. Result indicates that the throughput of PLD can be improved by 50.2% to 99.2% by using the EL-BPEG codes compared with the traditional QC-LDPC codes. Simulations show that the error performances of EL-BPEG codes are as well as the codes in standards.

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Layered Approx-Regular LDPC: Code Construction and Encoder/Decoder Design

Haibin Zhang, Jia Zhu, Huifeng Shi +1 more

Layered approximately regular (LAR) low-density parity-check (LDPC) codes are proposed, with which one single pair of encoder and decoder support various code lengths and code rates. The parity check matrices of LAR-LDPC codes have a "layer-block-cell" structure with some additional constraints. An encoder architecture is then designed for LAR-LDPC codes, by making two improvements to the Richardson-Urbanke approach: the forward substitution operation is entirely removed and the dense-matrix-vector multiplication is handled using feedback shift-registers. A partially parallel decoder architecture is also designed for LAR-LDPC codes, where a layered modified min-sum decoding algorithm is used to trade off among complexity, speed, and performance. More importantly, the interconnection network, which is inevitable for partially parallel decoders, has much lower hardware complexity compared with that for general LDPC codes. Both the encoder and decoder architectures are highly flexible in code length and code rate.

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On the Construction and Performance of LDPC Codes

B. N. Sindhu Tejaswini, Rajendra Prasad Lal, Vadlamudi Ch. Venkaiah

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Memory efficient column-layered decoder design for non-binary LDPC codes

Kai He, Jin Sha, Zhongfeng Wang

Low-density parity-check (LDPC) codes constructed over the Galois field GF(q) (q>;2), which are also called non-binary LDPC codes, are an extension of binary LDPC codes with significantly better performance. In this paper, an efficient column-layered decoding algorithm, which can reduce the message memory as well as the average number of iterations dramatically, is proposed for min-max decoding. In addition, a non-uniform quantization scheme is developed for reducing the word length while achieving similar performances compared to a conventional quantization scheme. Meanwhile, the corresponding decoder architecture is also proposed.

IEEE International Symposium on Circuits and Systems proceedings•May 1, 2012•1 citation
Pipelined layered decoder (PLD) of quasi-cyclic low-density parity-check (QC-LDPC) codes is one of most popular high-throughput decoder in modern communication systems. However, the traditional QC-LDPC codes are not suitable for PLD and lead to memory access conflict problems (MACPs) that reduce the throughput of PLD. Therefore, an efficient layered block progressive edge-growth (EL-BPEG) algorithm is proposed to construct a class of QC-LDPC codes that can avoid MACPs and increase throughput. EL-BPEG appends check nodes, rather than variable nodes, progressively into Tanner Graph with strict concentrated check-node degrees. And it establishes edges according to the latency of the pipelines in PLD; thus, all idle clocks can be eliminated for the PLD with EL-BPEG codes. Result indicates that the throughput of PLD can be improved by 50.2% to 99.2% by using the EL-BPEG codes compared with the traditional QC-LDPC codes. Simulations show that the error performances of EL-BPEG codes are as well as the codes in standards.
Layered approximately regular (LAR) low-density parity-check (LDPC) codes are proposed, with which one single pair of encoder and decoder support various code lengths and code rates. The parity check matrices of LAR-LDPC codes have a "layer-block-cell" structure with some additional constraints. An encoder architecture is then designed for LAR-LDPC codes, by making two improvements to the Richardson-Urbanke approach: the forward substitution operation is entirely removed and the dense-matrix-vector multiplication is handled using feedback shift-registers. A partially parallel decoder architecture is also designed for LAR-LDPC codes, where a layered modified min-sum decoding algorithm is used to trade off among complexity, speed, and performance. More importantly, the interconnection network, which is inevitable for partially parallel decoders, has much lower hardware complexity compared with that for general LDPC codes. Both the encoder and decoder architectures are highly flexible in code length and code rate.
Low-density parity-check (LDPC) codes constructed over the Galois field GF(q) (q>;2), which are also called non-binary LDPC codes, are an extension of binary LDPC codes with significantly better performance. In this paper, an efficient column-layered decoding algorithm, which can reduce the message memory as well as the average number of iterations dramatically, is proposed for min-max decoding. In addition, a non-uniform quantization scheme is developed for reducing the word length while achieving similar performances compared to a conventional quantization scheme. Meanwhile, the corresponding decoder architecture is also proposed.