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Joint Conference of the European Frequency and Time Forum and IEEE International Frequency Control Symposium (EFTF/IFCS)

Photonic Integrated Circuit Requirements for Chip-Scale Atomic Systems

Jeremi Januszewicz, A. P. McWilliams, S. Dyer, J. P. McGilligan, A. Arnold, Paul F. Griffin, E. Riis, Eugenio Di Gaetano, Ugnė Hawley, Marc Sorel, Kevin Francis Gallacher, Douglas J. Paul

Published May 1, 2026• 0 citations
Publisher
DOI
10.1109/ifcs68110.2026.11738406

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Photonic-integrated circuits have emerged as a scalable platform for complex quantum systems. A central goal is to integrate single-photon detectors to reduce optical losses, latency and wiring complexity associated with off-chip detectors. Superconducting nanowire single-photon detectors (SNSPDs) are particularly attractive because of high detection efficiency, sub-50-ps jitter and nanosecond-scale reset time. However, while single detectors have been incorporated into individual waveguides, the system detection efficiency of multiple SNSPDs in one photonic circuit-required for scalable quantum photonic circuits-has been limited to <0.2%. Here we introduce a micrometer-scale flip-chip process that enables scalable integration of SNSPDs on a range of photonic circuits. Ten low-jitter detectors are integrated on one circuit with 100% device yield. With an average system detection efficiency beyond 10%, and estimated on-chip detection efficiency of 14-52% for four detectors operated simultaneously, we demonstrate, to the best of our knowledge, the first on-chip photon correlation measurements of non-classical light.