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Microelectronics

CMOS-Compatible Electrostatic SWAP Gate in Silicon Quantum Dots: Tight-Binding Model and Beyond

Krzysztof Dominik Pomorski, Eryk Hałubek, Artur Michalak

Published Oct 17, 2026• 0 citations
Publisher

Abstract

We present a generalized electrostatic SWAP gate realized in a chain of two double quantum dots operated in the single-electron regime. Using a minimalist tight-binding model, we derive analytical results and corroborate them with numerical simulations. We exploit the charge anticorrelation arising from Coulomb repulsion and quantify the resulting entanglement generation. We contrast classical and quantum descriptions and show how device geometry and coupling strengths govern entanglement dynamics and gate performance. The results are relevant to cryogenic, CMOS-compatible quantum technologies and suggest a route toward large-scale semiconductor implementations of quantum logic. Finally, we outline a systematic procedure for translating classical electrostatic logic gates into single-electron quantum gates.

DOI
10.3390/microelectronics2040015

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cond-mat.mes-hallCross-listedarXiv:2607.04876•Jul 7, 2026
We present a generalized electrostatic SWAP gate realized in a chain of two double quantum dots operated in the single-electron regime. Using a minimalist tight-binding model, we derive analytical results and corroborate them with numerical simulations. We exploit the charge anticorrelation arising from Coulomb repulsion and quantify the resulting entanglement generation. We contrast classical and quantum descriptions and show how device geometry and coupling strengths govern entanglement dynamics and gate performance. The results are relevant to cryogenic, CMOS-compatible quantum technologies and suggest a route toward large-scale semiconductor implementations of quantum logic. Finally, we outline a systematic procedure for translating classical electrostatic logic gates into single-electron quantum gates.
We present a generalized electrostatic SWAP gate realized in a chain of two double quantum dots operated in the single-electron regime. Using a minimalist tight-binding model, we derive analytical results and corroborate them with numerical simulations. We exploit the charge anticorrelation arising from Coulomb repulsion and quantify the resulting entanglement generation. We contrast classical and quantum descriptions and show how device geometry and coupling strengths govern entanglement dynamics and gate performance. The results are relevant to cryogenic, CMOS-compatible quantum technologies and suggest a route toward large-scale semiconductor implementations of quantum logic. Finally, we outline a systematic procedure for translating classical electrostatic logic gates into single-electron quantum gates.
Generalized electrostatic quantum swap gate implemented in the chain of 2 double coupled quantum dots using single electron in semiconductor is presented in tight-binding simplistic model specifying both analytic and numerical results. The anticorrelation principle coming from Coulomb electrostatic repulsion is exploited in single electron devices. The formation of quantum entanglement is specified and supported by analytical results. The difference between classical and quantum picture is given. The correlations between geometry of quantum structures and entanglement dynamics are shown in analytical way. Effective wavefunction of single electrons is extracted from 2 electron electrostatic interactions. The presented results have its significance in cryogenic CMOS quantum technologies that gives perspective of implementation of semiconductor quantum computer on massive scale. Keyword: electrostatic quantum swap gate, entanglement, anticorrelation, tight-binding model, two-body wavefunction, correlation-anticorrelation crossover, density matrix of 2 electron system, single electron devices, coupled quantum dots
Abstract The fundamental properties of two electrostatically interacting single-electron lines (SEL) are determined from a minimalistic tight-binding model. The lines are represented by a chain of coupled quantum wells that can be implemented in a mainstream nanoscale CMOS process technology and tuned electrostatically by DC or AC voltage biases. The obtained results show an essential qualitative difference with two capacitively coupled classical electrical lines. The derived equations and their solutions prove that the two coupled SET lines can create an entanglement between electrons. The correlation function characterizing the correlation/anticorrelation in electron position is introduced both in quantum and classical descriptions of capacitively coupled SELs. The quantum measurement conducted on quantum and classical SELs is described. The difference in quantum and classical ground states can be used as the probe determining the ‘quantumness’ of the SEL system. The results indicate a possibility of constructing electrostatic (non-spin) coupled qubits that could be used as a building block in a CMOS quantum computer.
In this study, a formal definition, robustness analysis and discussion on the control of a position-based semiconductor charge qubit are presented. Such a qubit can be realized in a chain of coupled quantum dots, forming a register of charge-coupled transistor-like devices, and is intended for CMOS implementation in scalable quantum computers. We discuss the construction and operation of this qubit, its Bloch sphere, and relation with maximally localized Wannier functions which define its position-based nature. We then demonstrate how to build a tight-binding model of single and multiple interacting qubits from first principles of the Schrödinger formalism. We provide all required formulae to calculate the maximally localized functions and the entries of the Hamiltonian matrix in the presence of interaction between qubits. We use three illustrative examples to demonstrate the electrostatic interaction of electrons and discuss how to build a model for many-electron (qubit) system. To conclude this study, we show that charge qubits can be entangled through electrostatic interaction.
The spin of an electron confined in semiconductor quantum dots is currently a promising candidate for quantum bit (qubit) implementations. Taking advantage of the existing CMOS integration technologies, such devices can offer a platform for large scale quantum computation. However, a quantum mechanical framework bridging a device's physical design and operational parameters to the qubit's energy space is lacking. Furthermore, the spin to charge coupling introduced by intrinsic or induced spin-orbit interaction (SOI) exposes the qubits to charge noise compromising their coherence properties and inducing quantum gate errors. We present here a comodeling framework for double quantum dot (DQD) devices and their charge noise environments. We use a combination of an electrostatic potential solver, full configuration interaction quantum mechanical methods, and two-level-fluctuator models to study the quantum gate performance in realistic device designs and operation conditions. We utilize the developed models together alongside the single electron solutions of the quantum dots to simulate one- and two-qubit gates in the presence of charge noise. We find an inverse correlation between quantum gate errors and quantum dot confinement frequencies. We calculate X-gate fidelities >97>97%>97 in the simulated Si-MOS devices at a typical TLF density of ${10}^{11}\phantom{\rule{4pt}{0ex}}{\mathrm{cm}}^{\ensuremath{-}2}$. We also find that exchange driven two-qubit SWAP gates show higher sensitivity to charge noise with fidelities down to 9191%91 in the presence of the same density of TLFs. We further investigate the one- and two-qubit gate fidelities at different TLF densities. We find that given the small size of the quantum dots, sensitivity of a quantum gate to the distance between the noise sources and the quantum dot creates a strong variability in the quantum gate fidelities, which can compromise the device yields in scaled qubit technologies.
In advanced complementary metal-oxide-semiconductor (CMOS) quantum chips, compact gate stacks make it difficult to connect lithographic geometry, electrostatic confinement and many-electron spin filling in one transparent model. This connection is central to design-technology co-optimization (DTCO). Here we develop a reduced-order analytical framework for asymmetric multigate silicon quantum-dot devices. Its electrostatic core, the Poisson-kernel coupled-interface Green-function (PK-GF) model, agrees with an independent finite-volume solution at the millivolt scale for the matched two-dimensional problem, without fitting to that solution. We then pass the gate-derived confinement, rather than a harmonic or fitted potential, to a spin-valley many-body calculation for a jellybean quantum dot with N = 2-17 electrons at B = 5 T. The unrestricted Hartree-Fock (UHF) solution supports occupation-dependent, Wigner-molecule-like charge localization but likely overestimates spin polarization. Complete active-space configuration interaction (CASCI) supports a low-spin branch within the tested active spaces, which aligns with the experiments. The workflow therefore connects CMOS layout, device electrostatics, and potential-determined quantum observables, providing an auditable modelling layer for CMOS-based qubit design and DTCO.