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Efficient and identifiable noise models for symmetry-preserving quantum circuits

Yi Pan, Meng Hsiu Tsai, Hanqi Jiang, Junhao Chen, Weihang You, Yifan Zhou, Wei Zhang, Isaac Lyngaas, Yingfeng Wang, Tianming Liu

Published Oct 2, 2026• 0 citations
Publisher

Abstract

Abstract Noise models support quantum-circuit simulation and need recalibration as hardware and workloads change. For circuits whose ideal outputs occupy one Hamming-weight sector, independent bit-flip (IBF) models tie leakage from the sector to the flip rate. We introduce SA-IBF, a two-parameter closed-form model whose sector-preserving weight mixes independent bit flips with flips conditioned on the sector to control this leakage separately. For nonzero weights, no mixture of product bit-flip channels reproduces its kernel. Given ideal distributions, we derive local identifiability conditions and a rank diagnostic for each fit. Across two data sets on four IBM Heron processors, SA-IBF predicts test data with lower Hellinger distance than IBF on every execution. On molecular quantum-autoencoder circuits, it matches a 21-parameter noise model fitted by Bayesian optimization to within 0.01 in Hellinger distance at three of four qubit numbers, at over 200-fold lower computational cost. This enables low-cost noise modeling of small symmetry-preserving circuits.

DOI
10.21203/rs.3.rs-9740811/v2

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Abstract Noise models support quantum-circuit simulation and need recalibration as hardware and workloads change. For circuits whose ideal outputs occupy one Hamming-weight sector, independent bit-flip (IBF) models tie leakage from the sector to the flip rate. We introduce SA-IBF, a two-parameter closed-form model whose sector-preserving weight mixes independent bit flips with flips conditioned on the sector to control this leakage separately. For nonzero weights, no mixture of product bit-flip channels reproduces its kernel. Given ideal distributions, we derive local identifiability conditions and a rank diagnostic for each fit. Across two data sets on four IBM Heron processors, SA-IBF predicts test data with lower Hellinger distance than IBF on every execution. On molecular quantum-autoencoder circuits, it matches a 21-parameter noise model fitted by Bayesian optimization to within 0.01 in Hellinger distance at three of four qubit numbers, at over 200-fold lower computational cost. This enables low-cost noise modeling of small symmetry-preserving circuits.
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Maximizing the computational utility of near-term quantum processors requires predictive noise models that inform robust, noise-aware compilation and error mitigation. Conventional models often fail to capture the complex error dynamics of real hardware or require prohibitive characterization overhead. We introduce a data-efficient framework that first constructs a physically motivated, parameterized noise model, and subsequently employs machine-learning-driven Bayesian optimization to identify its parameters. Our approach circumvents costly characterization protocols by estimating algorithm- and hardware-specific error parameters directly from readily available experimental data derived from existing application and benchmark circuit executions. The generality and robustness of the framework are demonstrated across diverse algorithms and superconducting devices, yielding high-fidelity predictions by estimating an independent parameter set tailored to each specific algorithm-hardware context. Crucially, we show that a model calibrated exclusively on small-scale circuits accurately predicts the behavior of larger validation circuits. Our data-efficient approach achieves up to a 65% improvement in model fidelity quantified by the Hellinger distance between predicted and experimental circuit output distributions, compared to standard noise models derived from device properties. This work establishes a practical paradigm for application-aware noise characterization, enabling compilation and error-mitigation strategies tailored to the specific interplay between quantum algorithms and device-specific noise dynamics.
Circuits built from gates that conserve the Hamming weight keep their state in one weight sector, so the shots that left the sector can be discarded at read-out: the qg filter of the open-source library qang [1], a form of symmetry verification [2, 3]. We make it usable on IBM devices through IBM Runtime and Qiskit, and measure it on the noise models of twenty IBM devices. The library adds a Qiskit transpiler pass that decides whether the filter applies, read-out correction from each device's published per-qubit errors, qg read-outs of IBM Runtime Sampler and Estimator results, zero-noise extrapolation by gate folding that stacks with the filter, a prediction of the filter's kept fraction from the calibration, qubit selection with that prediction, a shot planner, and the weight-conserving quantum neural network (QNN) of qang as one parameterized job and as a qiskit-machine-learning SamplerQNN. Every prediction was committed before its run and is reported as passed or failed. On ten five-qubit weight-1 circuits the filter lowers the error of the measured qgZ = ⟨Z⟩ from 0.065-0.104 to 0.018-0.023 on three devices (0.013-0.022 with read-out correction), and filter plus zero-noise extrapolation reaches 0.011-0.015. On seventeen further devices never used before, the filter cuts the error 2.4-8.9× on every one (median 3.1× with read-out correction). Choosing the qubits by the predicted kept fraction keeps 6-17 points more shots than Qiskit's default layout on chain circuits, avoids a qubit published as reading 1 always, and the shot planner met a 0.02 target precision on three devices. For classification the gain is small: the QNN recovers 5-6 of the 10 decisions noise costs it. Reading a known five-component principal-component spectrum out of the data's density matrix in the weight-1 sector, filter plus read-out correction lowers the error 4.6× (median over twenty-one devices) and orders the spectrum correctly on 18 of 21 (13 raw). In Trotter simulation of the XY chain the filter halves the best error and moves the optimal number of Trotter steps deeper (16 of 21 devices), and in a quantum walk it turns a raw spreading indistinguishable from a classical random walk (exponent 0.87) into ballistic spreading (1.84). With two or three interacting excitations (XXZ chain) the gain falls from 5.6× to 2.6×: larger sectors let more of the noise through. Two interoperability bugs were found, one in qiskit-machine-learning and one in the library. All results are on device noise models; no hardware run is reported.
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The ability of a quantum computer to reproduce or replicate the results of a quantum circuit is a key concern for verifying and validating applications of quantum computing. Statistical variations in circuit outcomes that arise from ill-characterized fluctuations in device noise may lead to computational errors and irreproducible results. While device characterization offers a direct assessment of noise, an outstanding concern is how such metrics bound the reproducibility of a given quantum circuit. Here, we first directly assess the reproducibility of a noisy quantum circuit, in terms of the Hellinger distance between the computational results, and then we show that device characterization offers an analytic bound on the observed variability. We validate the method using an ensemble of single qubit test circuits, executed on a superconducting transmon processor with well-characterized readout and gate error rates. The resulting description for circuit reproducibility, in terms of a composite device parameter, is confirmed to define an upper bound on the observed Hellinger distance, across the variable test circuits. This predictive correlation between circuit outcomes and device characterization offers an efficient method for assessing the reproducibility of noisy quantum circuits.
This study examines how noise affects the reliability of quantum circuits through two complementary approaches: a controlled simulation using Qiskit Aer and an execution study on real IBM Quantum hardware. In simulation, five noise models (bit-flip, phase-flip, depolarizing, readout, and thermal-relaxation) were applied to a parameterized benchmark circuit across varying qubit counts, circuit depths, and noise strengths, producing 6,000 experimental observations. Success probability declined substantially as qubit count and circuit depth increased, with bit-flip, phase-flip, and depolarizing noise degrading performance far more severely (mean success probabilities of 0.597, 0.580, and 0.607) than readout noise (0.917) or thermal-relaxation noise (0.982). The same benchmark circuit was then executed on the ibm_marrakesh processor across 150 hardware runs (150,000 shots). Hardware performance remained consistently high (mean success probability 0.992), declining with qubit count (0.998 at two qubits to 0.986 at six) but showing little sensitivity to circuit depth. These results indicate that controlled noise mechanisms and real hardware degrade circuit performance through different dynamics, with implications for interpreting simulated noise models relative to physical device behavior.