Challenges
Datasets
Workspaces
Papers
Discussions
Leaderboard
Log inSign up
Challenges
Datasets
Workspaces
Papers
Discussions
Leaderboard
Blog
Job Board
Q3AS

© 2026 Aqora Quantum S.A.S.

TermsPrivacyLegal Notice

Constraint Physical Computing on Superconducting Bosonic Hardware: A Microwave-Referenced Feasibility, Native-Advantage, and Validation Roadmap

Karim Daghbouche

Published Sep 13, 2026• 0 citations
Publisher

Abstract

Constraint Physical Computing (CPC) asks whether engineered physical dynamics can perform useful computation directly from declarative constraint specifications. This white paper develops a feasibility, native-advantage, and validation roadmap for CPC on superconducting bosonic hardware, including cat-qubit, GKP, and multimode architectures. The central physical proposal combines stabilization dynamics protecting an admissible bosonic manifold with answer-independent, problem-dependent open-system dynamics intended to produce a declared semantic terminal sector. Rather than assuming that such a construction is computationally advantageous, the paper defines the physical, semantic, and resource-accounting conditions required to test it experimentally. These include bounded leakage, measurable convergence, control precision, robust referenced readout, fixed decoding, answer independence, provenance, and independent semantic validation. A Levinthal-Class Benchmark is introduced to distinguish large configuration-space avoidance from genuine computational advantage. Complete matched-confidence time-to-solution is compared against preregistered classical, quantum, physics-inspired, and structure-specific reference methods while accounting for compilation, physical synthesis, calibration, preparation, control, convergence, reset, readout, decoding, and validation. Four experimental outcomes are distinguished: backend conformance, physical semantic compatibility, competitive physical execution, and native CPC scaling advantage. The strongest outcome requires evidence of a growing advantage inconsistent with a constant implementation factor over the tested range. The proposal therefore treats native CPC advantage as a falsifiable experimental question rather than an assumed consequence of physical representation or engineered dissipation.

DOI
10.5281/zenodo.22737622

Related papers

Capability Without Self-Authorisation: A Constraint Physical Computing Research Programme for External Authority over Artificial Superintelligence (ASI)

Karim Daghbouche, Deniz DUMAN

Constraint Physical Computing (CPC) investigates two separately testable objectives: native computation through answer-independent compilation of declarative constraints into engineered physical dynamics, without requiring a prescribed quantum-gate sequence; and independently governed admission of specified consequential effects proposed by increasingly capable artificial intelligence. CPC does not prescribe human values or claim that unrestricted Artificial Superintelligence (ASI) has been contained. Uncontrolled decoherence and loss obstruct quantum scaling, alongside control, connectivity, readout and fault-tolerance costs. CPC investigates whether selected engineered dissipative processes can stabilize physical representations and implement problem-dependent constraint dynamics. Terminal-sector correctness, physical convergence, calibrated readout and complete resource scaling remain separate qualification obligations. Gate-free quantum computing has prior art; neither a CPC-specific quantum advantage nor native scalable quantum execution has been demonstrated. CPC Validation v0.7.0 integrates answer-independent compilation and open-system execution contracts, finite CPC–Shor models, pre-physical bosonic N0 tooling, and a bounded classical probability service on an iCE40UP5K FPGA with RP2040 transport. Three seeded SEED–PROB pairs produced six oracle-exact physical response frames comprising 132 16-bit words. Separately, an N = 15 order/factor witness was obtained from 256 simulated measurements. These results establish reusable semantic and implementation evidence, not physical quantum order finding, full physical oracle conformance, quantum scalability or an ASI authority gate. Bosonic WP–B1 conformance and physical N0 acquisition remain open. For external authority, CPC proposes a separately protected physical admission boundary for declared effect interfaces. Its concrete-harm exclusion theorem is conditional on complete mediation, sound refinement, independently qualified semantic adequacy and protected policy governance. The proposed tests are falsifiable; neither universal ASI containment nor a demonstrated CPC-specific security advantage over conventional reference monitors is claimed.

•Oct 26, 2026•0 citations

A Mathematical Framework for Carrier-Based Physical Computation: Constraint Compilation, Engineered Dissipation, and Microwave-Referenced Readout

Karim Daghbouche

We formulate a mathematical framework for validating candidate carrier-based physical computations. Logical continuation is kept distinct from compilation, physical preparation, open-system evolution, restricted observation, and decoding. For every finite boundary/future relation we construct a diagonal positive-semidefinite penalty Hamiltonian whose zero-versus-positive ground-energy class equals existential continuation. To connect this extensional static representation to candidate physical dynamics, we introduce a typed driven-dissipative architecture motivated by superconducting bosonic hardware. The generator is separated into a hardware-stabilization layer and an instance-dependent semantic problem layer. We define the fixed-point, protected-manifold, and no-spurious-state conditions required for exact dissipative compatibility. Protected violation-removal corrections are required to admit uniform synthesis and to preserve the encoded manifold. A Penalty-Lyapunov condition yields exponential decay of the expected excess penalty above the ground energy and, together with explicit fixed-point and convergence hypotheses, identifies the semantic ground sector as the terminal stationary set. For Hamiltonians differing only by a global scalar shift, normalized state data are identical in the absence of an operational energy reference. We therefore formulate a reference-coupled microwave decoding criterion: if calibrated measurement distributions remain uniformly separated under declared reference perturbations, a classical decoder achieves a quantified worst-case error bound. A four-level hierarchy separates static semantic representation, exact dissipative compatibility, efficient convergence, and robust physical readout, so that mathematical representation remains distinct from scalable physical synthesis.

•Aug 23, 2026•3 citations

Analog_Quantum_Simulator_of_Spin_Models

Walter Ayala

Version 6.1 develops an integral framework for an analog quantum simulator of spin modelsbased on programmable superconducting-qubit arrays.The principal objective is not merely to construct a quantum device, but to establish atraceable mappingcontrol parameters −→ Hreal −→ quantum evolution −→ observables −→ classical reference.The framework supports transverse-field Ising, XY, XXZ, Heisenberg, long-range, anddisordered spin Hamiltonians.Version 6.1 introduces an explicit Hamiltonian- identification layer between hardwarecalibration and scientific validation.The realized Hamiltonian is decomposed into target terms, static calibration errors, dynamiccontrol errors, crosstalk, leakage, decoherence, and residual unwanted interactions.Validation is organized hierarchically:1. hardware calibration;2. Hamiltonian identification;3. state-preparation validation;4. readout calibration;5. static observable validation;6. dynamical observable validation;7. finite-size benchmarking;8. statistical equivalence testing;9. cross-device reproducibility;10. independent analytical reproduction. The statistical framework replaces the inadequate criterion of “statistical significance ofagreement” with an equivalence framework based on preregistered tolerances.The primary hypothesis is therefore formulated using two one-sided tests (TOST) or anequivalent confidence interval criterion:|∆O| < ϵO.Version 6.1 additionally specifies:• a supplementary Bayesian posterior probability of equivalence as a robustness check;• an explicit distinction between engineering no-go and physical falsification.The framework also specifies negative controls, positive controls, blind analysis, lockedanalysis code, exclusion rules, uncertainty propagation, data provenance, and reproducibilityrequirements.No experimental result or quantum advantage is claimed.

•Sep 24, 2026•0 citations

Empirical Evidence for Structure-Dependent Realization in Superconducting Quantum Hardware

Luka Gluvić

This work reports experimental evidence that physical outcomes in quantum hardware depend on the interaction structure realized during execution rather than solely on the intended logical circuit description. Using four-qubit experiments on superconducting quantum processors, we demonstrate that nominally equivalent circuits may be compiled into distinct physical interaction graphs, leading to markedly different correlation patterns in measurement outcomes. The results support a structure-dependent realization perspective, in which global system constraints select admissible physical outcomes from a space of formally defined possibilities. The findings provide empirical grounding for realization-based theoretical frameworks and complement independent evidence obtained from temporal-coherence studies and gravitational systems. This work is not intended as a performance or optimization study, but as an experimental investigation of structural selection in physical systems.

•Jan 29, 2026•0 citations

Bosonic quantum computing with near-term devices and beyond

Timo Hillmann

(Abridged.) This thesis investigates scalable fault-tolerant quantum computation through the development of bosonic quantum codes, quantum LDPC codes, and decoding protocols that connect continuous-variable and discrete-variable error correction. We investigate superconducting microwave implementations of continuous-variable quantum computing, including the deterministic generation of cubic phase states, and introduce the dissipatively stabilized squeezed cat qubit, a noise-biased bosonic encoding with enhanced error suppression and faster gates. The performance of rotation-symmetric and GKP codes is analyzed under realistic noise and measurement models, revealing key trade-offs in measurement-based schemes. To integrate bosonic codes into larger architectures, we develop decoding methods that exploit analog syndrome information, enabling quasi-single-shot decoding in concatenated systems. On the discrete-variable side, we introduce localized statistics decoding, a highly parallelizable decoder for quantum LDPC codes, and propose quantum radial codes, a new family of single-shot LDPC codes with low overhead and strong circuit-level performance. Finally, we present fault complexes, a homological framework for analyzing faults in dynamic quantum error correction protocols. Extending the role of homology in static CSS codes, fault complexes provide a general language for the design and analysis of fault-tolerant schemes.

quant-pharXiv:2512.15063•Dec 18, 2025•0 citations

Characterization, Interaction, and Stack-Wide Impact of Hardware Constraints in Superconducting Quantum Processors: A State-of-the-Art Review

Anuththara Hettiarachchi, Kapila D. Dissanayaka, Jeewanee Bamunusinghe

The transition from noisy intermediate-scale quantum devices (error rate $\sim 10^{-3}$ ) to fault-tolerant quantum computation (requiring error rates below $10^{-4}$ for viable quantum error correction, and approaching $10^{-5}$ for practical fault tolerance) is impeded not by any single hardware shortfall but by the way hardware-layer constraints couple across the quantum computing stack. This review offers a blueprint for engineers designing superconducting quantum processors, organized around a three-stage analytical framework applied to five constraints: qubit coherence, gate fidelity, connectivity, readout errors, and crosstalk. The first stage, per-constraint characterization, shows that each constraint’s most severe failure mode generates correlated errors that violate the independence assumptions underlying quantum error correction. The second stage, pairwise interaction analysis, demonstrates that these constraints form a coupled degradation network in which a weakness in one systematically activates and amplifies failures in others, producing compound failure modes invisible to standard isolated benchmarking. The third stage, stack-wide scaling analysis, shows that improving any single constraint unlocks qualitatively different operational regimes only at discrete threshold crossings, so investment planning must target these transitions rather than incremental gains that yield no regime change. Each constraint’s dominant remaining limitation is then classified as either architecturally fundamental, requiring new device physics, or operationally mitigable through software and control advances. The central finding is that correlated error suppression cannot be fully achieved through local optimization, because the same electromagnetic proximity enabling quantum computation also generates the couplings that produce correlated errors. Achieving fault tolerance therefore requires co-design applied simultaneously rather than sequentially.

IEEE Access•Jan 1, 2026•0 citations
Constraint Physical Computing (CPC) asks whether engineered physical dynamics can perform useful computation directly from declarative constraint specifications. This white paper develops a feasibility, native-advantage, and validation roadmap for CPC on superconducting bosonic hardware, including cat-qubit, GKP, and multimode architectures. The central physical proposal combines stabilization dynamics protecting an admissible bosonic manifold with answer-independent, problem-dependent open-system dynamics intended to produce a declared semantic terminal sector. Rather than assuming that such a construction is computationally advantageous, the paper defines the physical, semantic, and resource-accounting conditions required to test it experimentally. These include bounded leakage, measurable convergence, control precision, robust referenced readout, fixed decoding, answer independence, provenance, and independent semantic validation. A Levinthal-Class Benchmark is introduced to distinguish large configuration-space avoidance from genuine computational advantage. Complete matched-confidence time-to-solution is compared against preregistered classical, quantum, physics-inspired, and structure-specific reference methods while accounting for compilation, physical synthesis, calibration, preparation, control, convergence, reset, readout, decoding, and validation. Four experimental outcomes are distinguished: backend conformance, physical semantic compatibility, competitive physical execution, and native CPC scaling advantage. The strongest outcome requires evidence of a growing advantage inconsistent with a constant implementation factor over the tested range. The proposal therefore treats native CPC advantage as a falsifiable experimental question rather than an assumed consequence of physical representation or engineered dissipation.
Constraint Physical Computing (CPC) investigates two separately testable objectives: native computation through answer-independent compilation of declarative constraints into engineered physical dynamics, without requiring a prescribed quantum-gate sequence; and independently governed admission of specified consequential effects proposed by increasingly capable artificial intelligence. CPC does not prescribe human values or claim that unrestricted Artificial Superintelligence (ASI) has been contained. Uncontrolled decoherence and loss obstruct quantum scaling, alongside control, connectivity, readout and fault-tolerance costs. CPC investigates whether selected engineered dissipative processes can stabilize physical representations and implement problem-dependent constraint dynamics. Terminal-sector correctness, physical convergence, calibrated readout and complete resource scaling remain separate qualification obligations. Gate-free quantum computing has prior art; neither a CPC-specific quantum advantage nor native scalable quantum execution has been demonstrated. CPC Validation v0.7.0 integrates answer-independent compilation and open-system execution contracts, finite CPC–Shor models, pre-physical bosonic N0 tooling, and a bounded classical probability service on an iCE40UP5K FPGA with RP2040 transport. Three seeded SEED–PROB pairs produced six oracle-exact physical response frames comprising 132 16-bit words. Separately, an N = 15 order/factor witness was obtained from 256 simulated measurements. These results establish reusable semantic and implementation evidence, not physical quantum order finding, full physical oracle conformance, quantum scalability or an ASI authority gate. Bosonic WP–B1 conformance and physical N0 acquisition remain open. For external authority, CPC proposes a separately protected physical admission boundary for declared effect interfaces. Its concrete-harm exclusion theorem is conditional on complete mediation, sound refinement, independently qualified semantic adequacy and protected policy governance. The proposed tests are falsifiable; neither universal ASI containment nor a demonstrated CPC-specific security advantage over conventional reference monitors is claimed.
We formulate a mathematical framework for validating candidate carrier-based physical computations. Logical continuation is kept distinct from compilation, physical preparation, open-system evolution, restricted observation, and decoding. For every finite boundary/future relation we construct a diagonal positive-semidefinite penalty Hamiltonian whose zero-versus-positive ground-energy class equals existential continuation. To connect this extensional static representation to candidate physical dynamics, we introduce a typed driven-dissipative architecture motivated by superconducting bosonic hardware. The generator is separated into a hardware-stabilization layer and an instance-dependent semantic problem layer. We define the fixed-point, protected-manifold, and no-spurious-state conditions required for exact dissipative compatibility. Protected violation-removal corrections are required to admit uniform synthesis and to preserve the encoded manifold. A Penalty-Lyapunov condition yields exponential decay of the expected excess penalty above the ground energy and, together with explicit fixed-point and convergence hypotheses, identifies the semantic ground sector as the terminal stationary set. For Hamiltonians differing only by a global scalar shift, normalized state data are identical in the absence of an operational energy reference. We therefore formulate a reference-coupled microwave decoding criterion: if calibrated measurement distributions remain uniformly separated under declared reference perturbations, a classical decoder achieves a quantified worst-case error bound. A four-level hierarchy separates static semantic representation, exact dissipative compatibility, efficient convergence, and robust physical readout, so that mathematical representation remains distinct from scalable physical synthesis.
Version 6.1 develops an integral framework for an analog quantum simulator of spin modelsbased on programmable superconducting-qubit arrays.The principal objective is not merely to construct a quantum device, but to establish atraceable mappingcontrol parameters −→ Hreal −→ quantum evolution −→ observables −→ classical reference.The framework supports transverse-field Ising, XY, XXZ, Heisenberg, long-range, anddisordered spin Hamiltonians.Version 6.1 introduces an explicit Hamiltonian- identification layer between hardwarecalibration and scientific validation.The realized Hamiltonian is decomposed into target terms, static calibration errors, dynamiccontrol errors, crosstalk, leakage, decoherence, and residual unwanted interactions.Validation is organized hierarchically:1. hardware calibration;2. Hamiltonian identification;3. state-preparation validation;4. readout calibration;5. static observable validation;6. dynamical observable validation;7. finite-size benchmarking;8. statistical equivalence testing;9. cross-device reproducibility;10. independent analytical reproduction. The statistical framework replaces the inadequate criterion of “statistical significance ofagreement” with an equivalence framework based on preregistered tolerances.The primary hypothesis is therefore formulated using two one-sided tests (TOST) or anequivalent confidence interval criterion:|∆O| < ϵO.Version 6.1 additionally specifies:• a supplementary Bayesian posterior probability of equivalence as a robustness check;• an explicit distinction between engineering no-go and physical falsification.The framework also specifies negative controls, positive controls, blind analysis, lockedanalysis code, exclusion rules, uncertainty propagation, data provenance, and reproducibilityrequirements.No experimental result or quantum advantage is claimed.
This work reports experimental evidence that physical outcomes in quantum hardware depend on the interaction structure realized during execution rather than solely on the intended logical circuit description. Using four-qubit experiments on superconducting quantum processors, we demonstrate that nominally equivalent circuits may be compiled into distinct physical interaction graphs, leading to markedly different correlation patterns in measurement outcomes. The results support a structure-dependent realization perspective, in which global system constraints select admissible physical outcomes from a space of formally defined possibilities. The findings provide empirical grounding for realization-based theoretical frameworks and complement independent evidence obtained from temporal-coherence studies and gravitational systems. This work is not intended as a performance or optimization study, but as an experimental investigation of structural selection in physical systems.
(Abridged.) This thesis investigates scalable fault-tolerant quantum computation through the development of bosonic quantum codes, quantum LDPC codes, and decoding protocols that connect continuous-variable and discrete-variable error correction. We investigate superconducting microwave implementations of continuous-variable quantum computing, including the deterministic generation of cubic phase states, and introduce the dissipatively stabilized squeezed cat qubit, a noise-biased bosonic encoding with enhanced error suppression and faster gates. The performance of rotation-symmetric and GKP codes is analyzed under realistic noise and measurement models, revealing key trade-offs in measurement-based schemes. To integrate bosonic codes into larger architectures, we develop decoding methods that exploit analog syndrome information, enabling quasi-single-shot decoding in concatenated systems. On the discrete-variable side, we introduce localized statistics decoding, a highly parallelizable decoder for quantum LDPC codes, and propose quantum radial codes, a new family of single-shot LDPC codes with low overhead and strong circuit-level performance. Finally, we present fault complexes, a homological framework for analyzing faults in dynamic quantum error correction protocols. Extending the role of homology in static CSS codes, fault complexes provide a general language for the design and analysis of fault-tolerant schemes.
The transition from noisy intermediate-scale quantum devices (error rate ∼10−3\sim 10^{-3}∼10−3 ) to fault-tolerant quantum computation (requiring error rates below 10−410^{-4}10−4 for viable quantum error correction, and approaching 10−510^{-5}10−5 for practical fault tolerance) is impeded not by any single hardware shortfall but by the way hardware-layer constraints couple across the quantum computing stack. This review offers a blueprint for engineers designing superconducting quantum processors, organized around a three-stage analytical framework applied to five constraints: qubit coherence, gate fidelity, connectivity, readout errors, and crosstalk. The first stage, per-constraint characterization, shows that each constraint’s most severe failure mode generates correlated errors that violate the independence assumptions underlying quantum error correction. The second stage, pairwise interaction analysis, demonstrates that these constraints form a coupled degradation network in which a weakness in one systematically activates and amplifies failures in others, producing compound failure modes invisible to standard isolated benchmarking. The third stage, stack-wide scaling analysis, shows that improving any single constraint unlocks qualitatively different operational regimes only at discrete threshold crossings, so investment planning must target these transitions rather than incremental gains that yield no regime change. Each constraint’s dominant remaining limitation is then classified as either architecturally fundamental, requiring new device physics, or operationally mitigable through software and control advances. The central finding is that correlated error suppression cannot be fully achieved through local optimization, because the same electromagnetic proximity enabling quantum computation also generates the couplings that produce correlated errors. Achieving fault tolerance therefore requires co-design applied simultaneously rather than sequentially.