Temporal Logic-Based Formal Verification of Quantum Circuits

Jincheng Zhang

Published Aug 28, 2026• 0 citations

Abstract

This paper presents a novel approach to verifying the correctness of quantum circuits using temporal logic. Traditional verification methods often rely on gate-level simulation, which can be computationally expensive and insufficient for complex quantum algorithms. This work addresses this limitation by formally modeling quantum circuits as temporal logic systems. We leverage the expressive power of temporal logic to capture the desired behavior of quantum algorithms, including their evolution over time and the effects of quantum phenomena like superposition and entanglement. The core of our method involves mapping the circuit's operations onto temporal logic specifications and utilizing automated theorem proving and model checking techniques, tailored to the probabilistic nature of quantum systems. We demonstrate that this approach provides a more rigorous and scalable verification framework compared to existing methods, offering a pathway to ensuring the reliability of quantum computations. The key contributions of this work are the formalization of quantum circuits with temporal logic, the adaptation of theorem proving and model checking techniques for quantum systems, and the potential for significantly improving the trustworthiness of quantum algorithms.

DOI: 10.5281/zenodo.22138177

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