This study investigates the problem of rapidly increasing memory requirements in classical simulation of quantum computations. As the dimensionality of a quantum system grows, the volume of data increases exponentially, which limits the applicability of traditional state-vector simulators to the available amount of RAM. As a result, simulation of systems exceeding 28–30 qubits becomes difficult without the use of specialized computing clusters. A method for optimizing the simulator architecture is proposed, based on the use of memory-mapped files to map data into the process address space and the utilization of high-speed NVMe storage devices as an extended level of the memory hierarchy. The software implementation is developed in the Rust programming language using safe memory management mechanisms and multithreaded data processing. Additionally, a bit-level amplitude indexing scheme has been designed to ensure sequential access to data arrays and reduce the rate of CPU cache misses. Experimental results dem
This study investigates the problem of rapidly increasing memory requirements in classical simulation of quantum computations. As the dimensionality of a quantum system grows, the volume of data increases exponentially, which limits the applicability of traditional state-vector simulators to the available amount of RAM. As a result, simulation of systems exceeding 28–30 qubits becomes difficult without the use of specialized computing clusters. A method for optimizing the simulator architecture is proposed, based on the use of memory-mapped files to map data into the process address space and the utilization of high-speed NVMe storage devices as an extended level of the memory hierarchy. The software implementation is developed in the Rust programming language using safe memory management mechanisms and multithreaded data processing. Additionally, a bit-level amplitude indexing scheme has been designed to ensure sequential access to data arrays and reduce the rate of CPU cache misses. Experimental results dem
Since the state-of-the-art quantum computers are still noisy and error-prone, classical simulation of quantum circuits is essential in verifying/calibrating quantum computers and prototyping/debugging complex quantum algorithms. Classical simulation of large quantum systems is challenging due to its exponential increase in space and computation requirements. In this paper, we propose a full-state simulation framework, SnuQS. It exploits storage devices, such as HDDs and NVMe SSDs, to enlarge the available main memory capacity at a small cost. To achieve maximum I/O bandwidth, we propose an overlay-based memory management technique and optimization techniques. We also propose an I/O subsystem architecture that guarantees the maximum bandwidth of each storage device. We evaluate SnuQS on a 64-core CPU and 4-GPU system with 80 2TB HDDs and 10 4TB NVMe SSDs using quantum supremacy and quantum Fourier transform circuits. The experimental result indicates that SnuQS and the proposed I/O subsystem together is an effective and practical solution to scale the full-state simulation of large quantum circuits at about 300X lower cost than the DDR4 DRAM main-memory-only system.
In response to the challenges in large-scale quantum state simulation on classical computing platforms, including memory limits, frequent disk I/O, and high computational complexity, this study builds upon a previously proposed hierarchical storage-based quantum simulation system and introduces an optimization framework, the Quantum Vector Optimization Framework (QVecOpt). QVecOpt integrates four strategies: amplitude pairing, cache optimization, block storage optimization, and parallel optimization. These collectively enhance state vector storage and computational scheduling. The amplitude pairing mechanism locates relevant amplitude pairs via bitwise XOR, reducing traversal complexity of single-qubit gates from O(2n) to O(1). Cache optimization pre-allocates buffers and loads only required data, cutting disk I/O. Block storage optimization partitions the state vector for on-demand loading and local updates, reducing redundant access. Parallel optimization distributes the state vector across nodes for collaborative computation, achieving near-linear speedup. Complexity analysis shows that, compared with hierarchical storage simulation, the method reduces state vector traversals for single-qubit gates from 2n to 1, removing the main bottleneck. It also lowers computational and I/O complexity from O(2n) to O(2n/C) and O(2n/B). In simulations of 16-29 qubits, efficiency improves nearly tenfold, breaking the memory bottleneck of existing tools and enabling high-bit quantum circuit simulations beyond traditional methods. This work provides an efficient, scalable solution for classical simulation of large-scale quantum computation with significant academic and practical value.
The assumption of maximum parallelism support for the successful realization of scalable quantum computers has led to homogeneous, "sea-of-qubits" architectures. The resulting architectures overcome the primary challenges of reliability and scalability at the cost of physically unacceptable system area. We find that by exploiting the natural serialization at both the application and the physical microarchitecture level of a quantum computer, we can reduce the area requirement while improving performance. In particular we present a scalable quantum architecture design that employs specialization of the system into memory and computational regions, each individually optimized to match hardware support to the available parallelism. Through careful application and system analysis, we find that our new architecture can yield up to a factor of thirteen savings in area due to specialization. In addition, by providing a memory hierarchy design for quantum computers, we can increase time performance by a factor of eight. This result brings us closer to the realization of a quantum processor that can solve meaningful problems
Software quantum simulators are the most accessible tools for designing and testing quantum algorithms. This paper presents a comprehensive approach to building a software-based quantum simulator based on classical computing architectures. We explore fundamental quantum computing concepts, including state vector representations, quantum gates, and memory management techniques. The simulator prototype implements various memory optimization strategies, such as full-state representation, dynamic state pruning, and shared memory parallelization with OpenMP and distributed memory models using MPI. Additionally, data compression techniques, like ZFP, are explored to enhance simulation performance by reducing memory footprint. The results are validated through performance comparisons with leading open-source quantum simulators, such as Intel-QS, QuEST, and qsim. Our findings highlight the trade-offs between computational overhead and memory efficiency. This demonstrates that a hybrid approach using distributed memory and compression offers the best scalability for simulating large quantum systems. This work provides a foundation for developing efficient quantum simulators supporting more complex quantum algorithms on classical hardware.
The classical simulation of quantum algorithms is a crucial tool for circuit development, testing, and validation. Although acceleration using GPUs significantly reduces simulation time, most high-performance simulators rely on vendor-specific frameworks that target data-center hardware. To broaden access to quantum simulation, this work proposes a vendor-agnostic approach targeting the integrated GPUs commonly found in consumer-grade laptops. A primary challenge in state-vector simulation is its inherently poor spatial locality, which creates a memory bandwidth bottleneck. Consequently, baseline implementations experience a severe degradation in relative GPU speedup as the number of simulated qubits increases. To address this limitation, we introduce a state partitioning optimization that reorganizes the quantum state vector to maximize the last-level cache locality and minimize costly main memory fetches. We evaluate this strategy using a Quantum Phase Estimation algorithm across diverse architectures from Intel, AMD, and Apple. The experimental results demonstrate that the proposed optimization successfully mitigates performance degradation at larger qubit scales. In particular, for a 28-qubit simulation, the optimization reversed a performance deficit on an Intel Core i5, improving the GPU speedup over the CPU from 0.95x to 1.89x, and increased the Apple M1 Pro speedup from 3.71x to 5.88x. Overall, this approach yields consistent execution time improvements, demonstrating the viability of integrated GPUs for efficient quantum circuit simulation.
Advances in quantum simulator technology are increasingly required because research on quantum algorithms is becoming more sophisticated and complex. State vector simulation utilizes CPU and memory resources in computing nodes exponentially with respect to the number of qubits; furthermore, in a variational quantum algorithm, the large number of repeated runs by classical optimization is also a heavy load. This problem has been addressed by preparing numerous computing nodes or simulation frameworks that operate effectively. This study aimed to accelerate quantum simulation using two newly proposed methods: to efficiently utilize limited computational resources by adjusting the ratio of the MPI and distributed processing parallelism corresponding to the target problem settings and to slim down the Hamiltonian by considering the effect of accuracy on the calculation result. Ground-state energy calculations of a fermionic model were performed using a variational quantum eigensolver (VQE) on an HPC cluster with up to 1024 FUJITSU Processor A64FX connected to each other by InfiniBand; the processor is also used on supercomputer Fugaku. We achieved 200 times higher speed over VQE simulations and demonstrated 32 qubits ground-state energy calculations in acceptable time. This result indicates that > 30 qubit state vector simulations can be realistically utilized for further research on variational quantum algorithms.