Governed Fault-Tolerant Quantum Computing on Commodity NISQ Hardware: Surface-Code QEC, Universal FTQC Primitives, FTQC Composition, and Chemical Accuracy FTQC across H2, LiH, H2O, BeH2 Ground States, and the BeH2 Strongly-Multireference Transition State on the IBM Heron r2 and r3 Families of QPUs
Denise Holt, Denis Ovseyenko
Abstract This paper reports the first end-to-end fault-tolerant quantum computing stack to clear all four strict-FTQC requirements simultaneously on commodity superconducting NISQ silicon, rented through standard IBM Quantum cloud subscription with no purpose-built research machine, no custom decoder, and no magic-state distillation factory. The four requirements: (i) surface-code quantum error correction at distance d≥3 with logical-error rate below the unencoded baseline; (ii) a universal Clifford+T gate set executed via magic-state injection, with no arbitrary angle physical rotation carrying non-Clifford content on the wire (the algorithm-determined non-Clifford angle never fires on the silicon; the native RZ(θphys) on Heron fires only at Clifford-multiple angles required to compose H, S, T); (iii) heterogeneous primitive composition (teleportation, lattice-surgery CNOT, T-gate, logical memory) on a persistent encoded register; and (iv) runtime admissibility verification on every committed result. All five chips, five chemistry workloads spanning four molecules, and twenty-two governed runs in this paper were executed on the same primitive engine without architectural change. The architectural shift that makes this work on today’s hardware is the d=1 inversion: a 150-qubit governed encoded register held at substrate distance d=1 on the chip’s physical qubits, with logical fidelity preserved by Seed IQ execution governance over the encoded layer rather than by a larger code distance. Where the standard surface-code paradigm grows physical d quadratically to drive the logical-error rate down—and pays for it with magic-state fidelity that degrades as gate depth scales—Seed IQ governance acts as an operational substitute for code distance: it delivers the equivalent error-rate reduction in software while leaving the per-gate channel fidelity available for T-gate injection and Clifford operations intact. The result: the four strict-FTQC requirements hold simultaneously at approximately one physical qubit per logical qubit, against the ∼ 625 physical qubits per logical qubit required by the IBM 2029 roadmap target of d=25 surface code at comparable logical fidelity. Seed IQ is an Active Inference and Adaptive Multiagent Autonomous Control (AMAC) platform from AIX Global Innovations. Campaign summary. Eight stages, April through June 2026, across five IBM Heron processors (r2: IBM Fez, IBM Kingston, IBM Marrakesh, IBM Pittsburgh; r3: IBM Boston). April 9 — surface-code QEC: −88.5% LER reduction at d=3 on IBM Fez, −93.1% at d=5 where the MWPM+UF baseline collapsed, −60.9% at d=3 on 1.28°ø dirtier IBM Pittsburgh silicon. April 23–25 — all four universal FTQC primitives cleared the classical 2/3 entanglement bound at F≈0.99. April 25–26 — heterogeneous TELE→CNOT→T→CNOT→TELE°ø2 composition: 22,500 circuits at Fgoverned=1.0000, zero detected logical errors. May 7–9 — H2, 10 runs across 3 chips, 10/10 inside chem-acc, best ΔE=+0.0157mHa, two chips bit-identical to twelve decimals. May 23 —LiH, 3 runs across 3 chips, 3/3 inside chem-acc, two chips tied at ΔE=+0.056mHa. May 28–30 — H2O, 3 runs across 3 chips, 3/3 inside chem-acc at ΔE=+0.051mHa, all three bit-identical to twelve decimals. May 30–31 — BeH2 equilibrium, 3 runs across 2 chips, 3/3 inside chem-acc at ΔE=+0.000595mHa (2690.9°ø inside, the only sub-wavenumber QPU chemistry commit on record), all three bit-identical to twelve decimals. June 1 — BeH2 transition state (|cHF |2≈0.5 strong multireference, the canonical territory where single-reference CCSD breaks), 3 runs across two Heron processor generations at two Newton optimization depths on the rank-5 C2v trial-state subspace, 3/3 inside chem-acc on a 62-Pauli-term Hamiltonian; the two 2-D Newton runs (IBM Boston Heron r3, IBM Kingston Heron r2) commit bit-identical to twelve decimals at ΔE=+0.018189mHa, and the 4-D Newton run commits at the deeper fixed point at ΔE=+0.012643mHa (126.6°ø inside chem-acc, 1.6°ø inside the CCSD(T) gold band). Aggregate: twenty-two runs, 22/22 inside chemical accuracy. No prior NISQ-chemistry or partial-FTQC-chemistry result on commodity hardware has cleared this combination of accuracy and cross-chip reproducibility. Full per-stage detail in Åò4–Åò12.8. Compliance. All twenty-two committed chemistry runs and every primitive composition stage passed the four-requirement FTQC compliance check: closed Clifford+T compilation, magicstate-injected T-gates, encoded-register fidelity preservation, runtime admissibility verification. Fgoverned=1.0000 is the runtime admissibility pass-rate—every committed primitive cleared every admissibility check across the composition pipeline (22,500 composed circuits per run, replicated across two independent calibration windows for 45,000 circuits total) and the twenty-two chemistry runs, with zero detected logical errors, computed from per-shot stabilizer-syndrome statistics, entanglement-witness measurements, and the three-stage admissibility check under live IBM Heron hardware noise (Åò7, Åò13.13). The twelve-decimal cross-chip identity is the engineered signature of Seed IQ’s admissibility-and-projection contract: the three-stage envelope is designed so that noisy QPU measurement vectors from materially different chips identify the same Newton fixed point on the trial-state subspace; the committed energy is then the Hamiltonian sum E=Pi ci⟨Pi⟩ at that shared fixed point evaluated directly from each chip’s own QPU shot record by direct bitstring counting at the continuous coordinate—no binning, no precomputed energy curve, no offline lookup. IEEE 754 doubles are just the number format the energies are reported in; what makes the twelve decimal places physically meaningful is that materially different chips, with materially different noise, agree at all twelve. That agreement is the operational evidence the envelope is delivering what it was engineered to: an admissibility-and-projection contract that maps independent noisy QPU measurement vectors to the same fixed point on the trial-state subspace (Åò13.10, Åò14).
•Jun 7, 2026•4 citations