This preliminary technical report introduces MPC4-Q, an external logic-operational immunity layer for quantum information recovery on real IBM Quantum hardware. The system does not claim to improve physical qubit lifetime. Instead, it searches for recoverable quantum information paths under real hardware noise and certifies them using raw success, readout mitigation, Wilson lower-bound statistics and MELON reliability. The experimental campaign was executed on IBM Marrakesh under a constrained runtime budget. The main IBM run evaluated MELON-ENTANGLE v3 at depth 1 using physical layout selection, scout/exploit phases, readout calibration, raw count collection and Wilson-bound acceptance. The best exploit candidate used depth 1, challenge state 000, mode melon, variant 2 and layout_id 3. It obtained 8055 successes over 8192 shots, with raw_success = 0.9832763671875, mitigated_success = 0.9919348111472791, Wilson99 lower bound = 0.9792164071213207 and MELON reliability = 0.9850393690738396. The result is intentionally reported conservatively: although readout-mitigated success exceeded 99%, the experiment did not pass the strict 99-Gate because the Wilson 99% lower bound remained below 0.99. This makes the dataset useful as an honest preliminary benchmark for logic-operational quantum information recovery on noisy cloud-accessible quantum hardware. The uploaded material includes the bilingual paper, LaTeX source package, experimental figures, CSV metric summaries and JSON metadata files. These files document the IBM backend, job identifiers, raw counts, circuit metadata, readout confusion matrices, scout metrics, exploit metrics and summary metrics. The implementation code is not released in this preliminary version and is planned for release after additional validation in a future IBM runtime window.
This preliminary technical report introduces MPC4-Q, an external logic-operational immunity layer for quantum information recovery on real IBM Quantum hardware. The system does not claim to improve physical qubit lifetime. Instead, it searches for recoverable quantum information paths under real hardware noise and certifies them using raw success, readout mitigation, Wilson lower-bound statistics and MELON reliability. The experimental campaign was executed on IBM Marrakesh under a constrained runtime budget. The main IBM run evaluated MELON-ENTANGLE v3 at depth 1 using physical layout selection, scout/exploit phases, readout calibration, raw count collection and Wilson-bound acceptance. The best exploit candidate used depth 1, challenge state 000, mode melon, variant 2 and layout_id 3. It obtained 8055 successes over 8192 shots, with raw_success = 0.9832763671875, mitigated_success = 0.9919348111472791, Wilson99 lower bound = 0.9792164071213207 and MELON reliability = 0.9850393690738396. The result is intentionally reported conservatively: although readout-mitigated success exceeded 99%, the experiment did not pass the strict 99-Gate because the Wilson 99% lower bound remained below 0.99. This makes the dataset useful as an honest preliminary benchmark for logic-operational quantum information recovery on noisy cloud-accessible quantum hardware. The uploaded material includes the bilingual paper, LaTeX source package, experimental figures, CSV metric summaries and JSON metadata files. These files document the IBM backend, job identifiers, raw counts, circuit metadata, readout confusion matrices, scout metrics, exploit metrics and summary metrics. The implementation code is not released in this preliminary version and is planned for release after additional validation in a future IBM runtime window.
This work evaluates Constraint-Level QUBO (CL-QUBO) circuit execution on IBM Quantum hardware for 34 reactor-scale fault tree subtrees spanning 5–8 basic events, selected from the 776-member quantum-feasible candidate pool established in Paper 9 (Peters, 2026). Circuits were constructed using the CL-QUBO encoding and QAOA Alternating Operator Ansatz at depth p = 1, transpiled to both ibm_torino (133 qubits) and ibm_marrakesh (156 qubits), and executed under three IBM Runtime Sampler configurations (RL0, RL1, RL2) with identical bound parameters (β = 0.2, γ = 0.2) across all resilience levels. A total of six hardware jobs consumed 476 seconds (7.93 minutes) of quantum runtime across 8,192 shots per circuit. The results demonstrate that at this circuit scale, 10–16 logical qubits transpiling to 78–150 two-qubit gates at depths of 165–338, hardware output distributions are overwhelmingly noise-dominated by standard distributional metrics. Neither RL1 nor RL2 produces improvement; RL1 actively degrades output quality relative to RL0 on both backends. However, direct comparison of hardware top-probability outcomes against SCRAM-validated prime implicants from Paper 9 reveals substantial above-random minimal cut set (MCS) enrichment relative to the uniform-random baseline in the n = 8 groups (6.2× and 3.8× expected random rate in the top-200 outcomes), demonstrating that CL-QUBO circuits produce detectable MCS-correlated structure even in distributions that appear noise-dominated by aggregate metrics. These findings characterize the current observed performance ceiling for this CL-QUBO configuration on the tested IBM backends and provide both distributional and MCS-correctness baselines against which future hardware improvements can be measured.
This paper presents a reproducible, audit-ready quantum hardware experiment for minimal cut set (MCS) inference on reactor fault tree subtrees using IBM Quantum hardware. Eight two-qubit subtrees were selected from a Phase 2B reactor-scale fault tree corpus spanning four nuclear hazard families (EQK, LOCA, TRANS, SGTR). Classical baselines were computed with SCRAM 0.16.2, yielding two order-1 MCS per instance. Shallow p = 1 Quantum Alternating Operator Ansatz (QAOA+) circuits were constructed using the Constraint-Level QUBO (CL-QUBO) encoding from Peters (2026b), transpiled to ibm_torino, and executed as batch jobs totaling 57,344 shots across four experiments. Raw hardware results showed apparent infeasible leakage of 13.2% on the hw = 0 state. A dedicated four-circuit readout calibration protocol revealed that this leakage was almost entirely attributable to readout error: after confusion-matrix correction (κ = 1.56), the baseline experiment concentrates 98.3% of probability mass on the MCS manifold (hw = 1), with residual infeasible mass of 0.5%. Extension experiments substantially broaden the empirical foundation. Cross-pair validation on three additional qubit pairs (ibm_torino pairs 61–62 and 36–48; ibm_marrakesh pair 6–7) confirms that corrected MCS fidelity exceeds 95% across all tested physical qubit assignments (range 95.2%–98.3%), with the best pairs achieving 98.2% (ibm_marrakesh 6–7) and 97.9% (ibm_torino 61–62). A QAOA depth sweep (p ∈ {1, 2, 3}) on ibm_torino pair 0–1 quantifies noise–depth tradeoffs: because the mixer is inactive (β = 0), the observed redistribution from hw = 2 toward hw = 1 (7.8% at p = 1, 25.6% at p = 2, 40.9% at p = 3) is attributable to gate noise rather than productive mixing, with infeasible hw = 0 mass rising concurrently from 0.2% to 7.2%. A three-qubit exactly-one constraint experiment on ibm_torino triple 0–1–2 achieves 92.2% corrected hw = 1 mass from a feasible initialization, demonstrating that the CL-QUBO framework extends beyond two-qubit OR gates to richer constraint types on quantum hardware. Hard-start initialization experiments confirm that p = 1 circuits do not induce sufficient mixing to recover MCS states from non-minimal initializations, with this conclusion stable across independent replication and all tested qubit pairs. Complete experimental artifacts with SHA-256 verification are provided under the DOI above.
This study examines how noise affects the reliability of quantum circuits through two complementary approaches: a controlled simulation using Qiskit Aer and an execution study on real IBM Quantum hardware. In simulation, five noise models (bit-flip, phase-flip, depolarizing, readout, and thermal-relaxation) were applied to a parameterized benchmark circuit across varying qubit counts, circuit depths, and noise strengths, producing 6,000 experimental observations. Success probability declined substantially as qubit count and circuit depth increased, with bit-flip, phase-flip, and depolarizing noise degrading performance far more severely (mean success probabilities of 0.597, 0.580, and 0.607) than readout noise (0.917) or thermal-relaxation noise (0.982). The same benchmark circuit was then executed on the ibm_marrakesh processor across 150 hardware runs (150,000 shots). Hardware performance remained consistently high (mean success probability 0.992), declining with qubit count (0.998 at two qubits to 0.986 at six) but showing little sensitivity to circuit depth. These results indicate that controlled noise mechanisms and real hardware degrade circuit performance through different dynamics, with implications for interpreting simulated noise models relative to physical device behavior.
Abstract We report a hardware implementation of a reversible imprint-retrieval cycle motivated by the Quantum Memory Matrix (QMM) framework. Using IBM Quantum backends, we realize five circuits that scale from a minimal three-qubit memory cell to a five-qubit dual-cycle architecture, including variants with controlled phase evolution and deliberate perturbation. Because the circuit readout is based on computational-basis bit strings, the primary experimental metric is the basis-matched retrieval probability, Pret=Nmatch/Nshots P ret = N match / N shots , reported together with Wilson-score 95% 95 % confidence intervals, Pearson correlations, and mutual information between field and output qubits. Across the five experiments, Pret P ret ranges from 0.487±0.017 0.487 ± 0.017 in the evolution stress test to 0.732±0.012 0.732 ± 0.012 in the baseline three-qubit cycle, with the dual-cycle and controlled-error variants remaining near 0.70 under realistic device noise. These results provide a proof-of-principle demonstration that finite-dimensional quantum registers can store and return basis-level information through local unitary gates. The experiments therefore support the operational imprint-retrieval primitive underlying QMM, while also identifying full state tomography as the next step toward verifying phase-coherent state recovery.
This technical report packages a set of hardware component-witness experiments run on IBM superconducting quantum processors. The experiments test whether a hidden auxiliary phase can affect a later system-qubit measurement, whether that phase can be recovered from basis-resolved readout, and whether two auxiliary registers can produce a nonadditive response rather than a simple sum of their individual effects. The package includes the report draft, figures, raw hardware result JSONs, raw-count appendix, and scripts for regenerating the figures and count tables. The central result chain is: echo/phase response on real hardware, basis-resolved phase readout without density-matrix tomography, and a two-register Y-basis nonadditivity test where the first run remains a frozen FAIL and an independent higher-shot replication reaches STRONG_PASS. The longer-term motivation is to develop small, testable quantum hardware primitives for systems that can preserve, read out, and combine latent histories or unchosen alternatives, instead of reducing every intermediate state to a single classical output immediately. In that sense, these experiments are intended as early building blocks for future quantum-assisted sequence or language-model architectures. This work does not claim a completed quantum language model, natural-language processing on a quantum computer, consciousness, selfhood, classical impossibility, or quantum advantage. It reports only hardware component witnesses on specific IBM backends, edges, and calibration windows, with the possibility of richer classical explanations left open.
Quantum Polycontextural Computing (QPC) is a hardware-agnostic orchestration layer that maps multiple labelled problem contexts onto one gate-model execution on commercial superconducting QPUs. We report three auditable hardware studies on IBM Heron (ibm_fez, ibm_marrakesh) under the IBM Open plan, each with published job identifiers and JSON artifacts: (i) a 46-qubit mastoparan-I folding pilot compared to a published trapped-ion BF-DCQO energy reference (−8.70); QPC Tier-D repair reaches −9.74 in one pass with eight recoverable job IDs; (ii) a controlled K-ablation on 16 qubits where polycontextural K=4 fits held-out Wang–Busemeyer joint statistics better than a matched K=1 control (bootstrap one-sided p<0.0005 on total-variation and KL); (iii) thirteen Runtime jobs demonstrating co-resident multi-context layouts from 4×39Q through 24 contexts in six cluster submissions. A supplementary transjunction ON vs OFF ablation at 3×26Q shows bridge-local inter-context correlators increase by |Δ|>0.05 when ring coupling is enabled, after QPC readout mitigation on bridge qubits only; full-width correlators do not separate conditions. We state limitations explicitly: QPC is not a new QPU; protein and cognition results are selective comparisons, not universal advantage claims; open-instance entropy alone does not signature the architecture.