Challenges
Datasets
Workspaces
Papers
Discussions
Leaderboard
Log inSign up
Challenges
Datasets
Workspaces
Papers
Discussions
Leaderboard
Blog
Job Board
Q3AS

© 2026 Aqora Quantum S.A.S.

TermsPrivacyLegal Notice

Circuit Based Error Detection and Correction Scheme for Quantum System

Zaman, Muhammad

Published Jan 1, 2026• 0 citations
Publisher
DOI
10.13140/rg.2.2.10391.74407

Related papers

Low-overhead fault-tolerant error correction scheme based on quantum stabilizer codes

Xiu‐Bo Chen, Li-Yun Zhao, Gang Xu +4 more

Fault-tolerant error-correction (FTEC) circuit is the foundation for achieving reliable quantum computation and remote communication. However, designing a fault-tolerant error correction scheme with a solid error-correction ability and low overhead remains a significant challenge. In this paper, a low-overhead fault-tolerant error correction scheme is proposed for quantum communication systems. Firstly, syndrome ancillas are prepared into Bell states to detect errors caused by channel noise. We propose a detection approach that reduces the propagation path of quantum gate fault and reduces the circuit depth by splitting the stabilizer generator into X-type and Z-type. Additionally, a syndrome extraction circuit is equipped with two flag qubits to detect quantum gate faults, which may also introduce errors into the code block during the error detection process. Finally, analytical results are provided to demonstrate the fault-tolerant performance of the proposed FTEC scheme with the lower overhead of the ancillary qubits and circuit depth.

Chinese Physics B•Nov 10, 2021•3 citations

General error mitigation for quantum circuits

Manpreet Singh Jattana, Fengping Jin, Hans A. De Raedt +1 more

•Jan 1, 2020•4 citations

Title: Quantum-Inspired Error Correction for Complex Quantum Circuits

Jincheng Zhang

Quantum-inspired error correction (QIEC) offers a promising avenue for enhancing the reliability of quantum information processing. This paper explores the development of a novel QIEC scheme predicated on the principles of superposition and entanglement, specifically tailored to address the inherent complexities of quantum circuits. We outline a mechanism that leverages these quantum properties to create a robust error detection and correction process, moving beyond the limitations of traditional methods. The core claim is that this QIEC scheme will significantly improve error resilience, particularly for intricate quantum circuits with high error rates. This work delves into the theoretical underpinnings of the proposed mechanism, detailing the mathematical framework and illustrating its potential application through a focused case study.

•Sep 6, 2026•0 citations

Error Correction in Quantum Computing

Jesús Yaljá Montiel-Pérez, Jordi Fabián González-Contreras, Erik Zamora +1 more

Studies in computational intelligence•Jan 1, 2025•0 citations

Concatenation Schemes for Topological Fault-tolerant Quantum Error Correction

Zhaoyi Li, Isaac H. Kim, Patrick M. Hayden

We investigate a family of fault-tolerant quantum error correction schemes based on the concatenation of small error detection or error correction codes with the three-dimensional cluster state. We propose fault-tolerant state preparation and decoding schemes that effectively convert every circuit-level error into an erasure error, leveraging the cluster state's high threshold against such errors. We find a set of codes for which such a conversion is possible, and study their performance against the standard circuit-level depolarizing model. Our best performing scheme, which is based on a concatenation with a classical code, improves the threshold by 16.5% and decreases the spacetime overhead by 32% compared to the scheme without concatenation, with each scheme subject to a physical error rate of 10−3 and achieving a logical error rate of 10−6 .

arXiv:2209.09390•Quantum•Aug 22, 2023•7 citations

Error Correction for Quantum Computers

WORLD SCIENTIFIC eBooks•Jul 1, 1998•0 citations
Fault-tolerant error-correction (FTEC) circuit is the foundation for achieving reliable quantum computation and remote communication. However, designing a fault-tolerant error correction scheme with a solid error-correction ability and low overhead remains a significant challenge. In this paper, a low-overhead fault-tolerant error correction scheme is proposed for quantum communication systems. Firstly, syndrome ancillas are prepared into Bell states to detect errors caused by channel noise. We propose a detection approach that reduces the propagation path of quantum gate fault and reduces the circuit depth by splitting the stabilizer generator into X-type and Z-type. Additionally, a syndrome extraction circuit is equipped with two flag qubits to detect quantum gate faults, which may also introduce errors into the code block during the error detection process. Finally, analytical results are provided to demonstrate the fault-tolerant performance of the proposed FTEC scheme with the lower overhead of the ancillary qubits and circuit depth.
Quantum-inspired error correction (QIEC) offers a promising avenue for enhancing the reliability of quantum information processing. This paper explores the development of a novel QIEC scheme predicated on the principles of superposition and entanglement, specifically tailored to address the inherent complexities of quantum circuits. We outline a mechanism that leverages these quantum properties to create a robust error detection and correction process, moving beyond the limitations of traditional methods. The core claim is that this QIEC scheme will significantly improve error resilience, particularly for intricate quantum circuits with high error rates. This work delves into the theoretical underpinnings of the proposed mechanism, detailing the mathematical framework and illustrating its potential application through a focused case study.
We investigate a family of fault-tolerant quantum error correction schemes based on the concatenation of small error detection or error correction codes with the three-dimensional cluster state. We propose fault-tolerant state preparation and decoding schemes that effectively convert every circuit-level error into an erasure error, leveraging the cluster state's high threshold against such errors. We find a set of codes for which such a conversion is possible, and study their performance against the standard circuit-level depolarizing model. Our best performing scheme, which is based on a concatenation with a classical code, improves the threshold by 16.5% and decreases the spacetime overhead by 32% compared to the scheme without concatenation, with each scheme subject to a physical error rate of 10−3 and achieving a logical error rate of 10−6 .