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International Journal of Novel Research and Development

STUDY AND REALIZATION OF SIMPLE QUANTUM GATES

Lavanya Ravala, S. Vishnu Priya, G .V. Sujitha, B. Jahnavi, Kolamgari Akhil

Published Apr 1, 2026• 0 citations
Publisher

Abstract

Quantum computing represents a paradigm shift in computation by leveraging the principles of quantum mechanics such as superposition, entanglement, and interference to perform operations beyond classical limitations. Unlike classical computing systems that rely on irreversible logic operations and suffer from energy dissipation due to information loss, quantum systems utilize reversible unitary transformations that preserve information and improve computational efficiency. This paper presents a comprehensive framework for the design, simulation, and validation of quantum gates and reversible arithmetic circuits, including half adders and half subtractors. The proposed approach systematically maps classical arithmetic logic into quantum circuits using fundamental quantum gates such as Pauli-X, Hadamard, Controlled-NOT (CNOT), and Toffoli gates. The circuits are implemented and simulated using the Qiskit Aer framework, enabling detailed analysis of quantum state evolution and measurement outputs. The results obtained from simulation include program-level outputs, state vector representations, measurement counts, and probability distributions, all of which demonstrate strong agreement with classical truth tables. The analysis confirms the correctness, reversibility, and scalability of the proposed designs. Furthermore, a comparative performance evaluation highlights the advantages of quantum computing over classical approaches in terms of parallelism and energy efficiency. The proposed framework establishes a robust foundation for future implementation of complex Boolean logic and arithmetic operations in quantum systems.

DOI
10.56975/ijnrd.v11i4.322489

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Quantum computing is an emerging computational paradigm that represents and processes information using quantum states. This paper presents the implementation and simulation of a Quantum Half Adder using the IBM Qiskit framework. The proposed circuit performs one-bit binary addition and produces two outputs, SUM and CARRY, through reversible quantum operations. Classical input values are encoded into quantum states using Pauli-X gates. Controlled-NOT (CNOT) gates are used to realize the XOR relationship required for SUM generation, while a Toffoli (CCNOT) gate realizes the AND relationship required for CARRY generation. The complete design is implemented in Python and executed using the Qiskit Aer Simulator. Four possible input combinations are evaluated and the measured outputs are compared with the expected Half Adder truth table. Circuit visualization, terminal output, and measurement histograms are used to verify the operation. The results show that the simulated circuit produces the expected SUM and CARRY values for all input combinations. The work provides a simple practical model for understanding reversible quantum computation, quantum gates, and Qiskit-based quantum circuit simulation.
A quantum gate is the quantum analog of the classical logic gate of digital computers. It is a basic structural unit of a quantum circuit which operates on a small number of qubits to deliver a predefined output. A quantum circuit is a graphical representation of the sequence of the quantum gates used and the measurements performed in a quantum computation. Various quantum logic gates, namely, the Hadamard, T phase, NOT, Pauli-X, controlled NOT (CNOT), controlled-Z, SWAP and controlled phase gates as well as higher-level Toffoli and Fredkin gates are described. Conventions of reading quantum circuit diagrams are explained. Operation of a quantum full adder consisting of registers and gates is discussed, elaborating the role of the NOT gate, the sum calculation with CNOTgates and the carry C-out calculation with Toffoli gates. A primary tool used for performing arithmetic operations on a quantum computer is the quantum Fourier transform (QFT). The QFT adder and multiplier circuits are presented.
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