The compilation of an algorithm can vary significantly with the choice of physical hardware platform and error correction model. Yet, current compilation frameworks typically commit to a single architecture-hardware configuration, making it difficult to assess resource estimates across platforms. We present a platform-aware compilation framework that re-compiles a quantum circuit into a hardware-compatible instruction set as well as fault-tolerant operations and provides end-to-end resource estimates in terms of physical-qubit count, time-to-solution, and classical processing time. We benchmark the framework by obtaining end-to-end resource estimates for different compilers, each tailored to the functionalities of specific hardware modalities: connectivity, clock speed, and noise model. As part of this framework, we introduce a transversal active volume (t-AV) compilation architecture designed for the efficient execution of fault-tolerant operations in platforms supporting long-range logical connectivity. We benchmark the framework for Hamiltonian simulation of the 2D Fermi Hubbard model as well as for eigenenergy estimation of a small molecule (trimethylenemethane) as a candidate for early fault-tolerant demonstration of quantum chemistry. For the latter, we show that end-to-end quantum simulations can be achieved with
∼104 physical qubits and runtimes ranging from
102 ms (photonics, superconducting) to
105 ms (neutral atoms).
State-of-the-art noisy-intermediate-scale quantum processors are currently implemented across a variety of hardware platforms, each with their own distinct gatesets. As such, circuit compilation should not only be aware of but also deeply connect to the native gateset and noise properties of each. Trapped-ion processors are one such platform that provides a gateset that can be continuously parameterized across both one- and two-qubit gates. Here we use the Quantum Scientific Computing Open User Testbed to study noise-aware compilations focused on continuously parameterized two-qubit Z Z gates (based on the Mølmer-Sørensen interaction) using , a quantum software platform for hardware-aware circuit compiler optimizations. We discuss the realization of Z Z gates with arbitrary angle on the all-to-all connected trapped-ion system. Then we discuss a variety of different compiler optimizations that innately target these Z Z gates and their noise properties. These optimizations include moving from a restricted maximally entangling gateset to a continuously parameterized one, swap mirroring to further reduce the total entangling angle of the operations, focusing the heaviest Z Z angle participation on the best-performing gate pairs, and circuit approximation to remove the least impactful Z Z gates. We demonstrate these compilation approaches on the hardware with randomized quantum volume circuits, observing the potential to realize a larger quantum volume as a result of these optimizations. Using differing yet complementary analysis techniques, we observe the distinct improvements in system performance provided by these noise-aware compilations and study the role of stochastic and coherent error channels for each compilation choice.
Traditional compiler optimization focuses on maximizing performance within the constraints of classical architectures. However, quantum computing presents a fundamentally different paradigm, demanding a new approach to software optimization. This paper proposes a hardware-aware compiler optimization technique, inspired by quantum computing principles, to bridge the gap between high-level programming languages and the specific characteristics of quantum hardware. The core idea is to translate high-level code into quantum circuits while explicitly considering factors like qubit connectivity, gate fidelity, and decoherence. This approach allows for optimization strategies tailored to the unique limitations and opportunities of quantum devices, potentially leading to significant performance improvements compared to generic quantum compilation methods. The compiler operates by analyzing the algorithmic complexity, identifying quantum-native operations, and strategically mapping them onto the available quantum hardware, thereby minimizing the impact of hardware constraints. This paper outlines the framework, key components, and potential optimizations within this hardware-aware compiler.