Universal multiport interferometers based on Mach–Zehnder meshes are becoming a core building block for photonic neural-network accelerators and photonic quantum processors. This thesis presents the design, calibration, and control of such a programmable photonic integrated circuit (PIC). A fully automated software and hardware platform is developed to characterize and control the tunable elements of the PIC, enabling robust implementation of arbitrary linear optical transformations as well as target unitary operations. Using the calibrated device model, the control framework programs the PIC to realize specific unitaries and evaluates their performance through fidelity metrics computed from measured transfer matrices. By covering the complete stack from chip design to automated calibration and high-level unitary programming, this work establishes a scalable framework for design and operation of programmable photonic processors.
Programmable integrated photonics (PIP) has emerged as a powerful on-chip platform for optical signal processing and computing, enabling the implementation of reconfigurable N
×N unitary matrix transformations through meshes of tunable interferometers, which realize 2$\times
2unitarymatrices.However,theenergyconsumptionassociatedwithphase−shifteractuationisbecomingamajorlimitationtothescalabilityofPIPplatforms.Here,weintroduceageometricframeworkforenergyoptimizationinPIPcircuitsbyexploitingtherepresentationof2\times
2unitarymatricesasconcatenationsofbasicEulerrotationsontheBlochsphere.WeshowthatequivalentimplementationsofthesameN\times$N unitary matrix (N
≥ 2) can exhibit markedly different energy costs depending on the rotation trajectories on the Bloch sphere implemented by each interferometer. Leveraging this insight, we identify minimum-energy configurations by systematically selecting the shortest rotation trajectories. We experimentally and numerically validate the proposed approach in diverse silicon PIP architectures, including feedforward and multipurpose hexagonal meshes, neural network accelerators, and photonic quantum-gate implementations. These results establish a general route toward more energy-efficient large-scale PIP processors for classical and quantum signal processing and computing applications.