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arXiv:2605.19570

Energy-efficient programmable integrated photonics via optimized Euler rotations

Pablo Martínez-Carrasco Romero, Andrés Macho, José Roberto Rausell‐Campo, Francisco Javier Fraile-Pelaez, José Capmany Francoy

Published May 19, 2026• 0 citations
arXivHTMLPDF

Abstract

Programmable integrated photonics (PIP) has emerged as a powerful on-chip platform for optical signal processing and computing, enabling the implementation of reconfigurable N$\times$N unitary matrix transformations through meshes of tunable interferometers, which realize 2$\times$2 unitary matrices. However, the energy consumption associated with phase-shifter actuation is becoming a major limitation to the scalability of PIP platforms. Here, we introduce a geometric framework for energy optimization in PIP circuits by exploiting the representation of 2$\times$2 unitary matrices as concatenations of basic Euler rotations on the Bloch sphere. We show that equivalent implementations of the same N$\times$N unitary matrix (N $\geq$ 2) can exhibit markedly different energy costs depending on the rotation trajectories on the Bloch sphere implemented by each interferometer. Leveraging this insight, we identify minimum-energy configurations by systematically selecting the shortest rotation trajectories. We experimentally and numerically validate the proposed approach in diverse silicon PIP architectures, including feedforward and multipurpose hexagonal meshes, neural network accelerators, and photonic quantum-gate implementations. These results establish a general route toward more energy-efficient large-scale PIP processors for classical and quantum signal processing and computing applications.

DOI
10.48550/arxiv.2605.19570

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Programmable integrated photonics (PIP) has emerged as a powerful on-chip platform for optical signal processing and computing, enabling the implementation of reconfigurable N×\times×N unitary matrix transformations through meshes of tunable interferometers, which realize 2×\times×2 unitary matrices. However, the energy consumption associated with phase-shifter actuation is becoming a major limitation to the scalability of PIP platforms. Here, we introduce a geometric framework for energy optimization in PIP circuits by exploiting the representation of 2×\times×2 unitary matrices as concatenations of basic Euler rotations on the Bloch sphere. We show that equivalent implementations of the same N×\times×N unitary matrix (N ≥\geq≥ 2) can exhibit markedly different energy costs depending on the rotation trajectories on the Bloch sphere implemented by each interferometer. Leveraging this insight, we identify minimum-energy configurations by systematically selecting the shortest rotation trajectories. We experimentally and numerically validate the proposed approach in diverse silicon PIP architectures, including feedforward and multipurpose hexagonal meshes, neural network accelerators, and photonic quantum-gate implementations. These results establish a general route toward more energy-efficient large-scale PIP processors for classical and quantum signal processing and computing applications.
General-purpose programmable photonic processors provide a versatile platform for integrating diverse functionalities on a single chip. Leveraging a two-dimensional hexagonal waveguide mesh of Mach–Zehnder interferometers, these systems have demonstrated significant potential in microwave photonic applications. Additionally, they are a promising platform for creating unitary linear transformations, which are key elements in quantum computing and photonic neural networks. However, a general procedure for implementing these transformations on such systems has not been established yet. This work demonstrates the programming of universal unitary transformations on a general-purpose programmable photonic circuit with a hexagonal topology. We detail the steps to split the light on-chip, demonstrate that an equivalent structure to the Mach–Zehnder interferometer with one internal and one external phase shifter can be built in the hexagonal mesh, and program both the triangular and rectangular architectures for matrix multiplication. We recalibrate the system to account for passive phase deviations. Experimental programming of 3 × 3 and 4 × 4 random unitary matrices yields fidelities >98% and bit precisions over five bits. To the best of our knowledge, this is the first time that random unitary matrices are demonstrated on a general-purpose photonic processor and pave the way for the implementation of programmable photonic circuits in optical computing and signal processing systems.
General-purpose programmable photonic processors provide a versatile platform for integrating diverse functionalities on a single chip. Leveraging a two-dimensional hexagonal waveguide mesh of Mach-Zehnder interferometers, these systems have demonstrated significant potential in microwave photonics applications. Additionally, they are a promising platform for creating unitary linear transformations, which are key elements in quantum computing and photonic neural networks. However, a general procedure for implementing these transformations on such systems has not been established yet. This work demonstrates the programming of universal unitary transformations on a general-purpose programmable photonic circuit with a hexagonal topology. We detail the steps to split the light on-chip, demonstrate that an equivalent structure to the Mach-Zehnder interferometer with one internal and one external phase shifter can be built in the hexagonal mesh, and program both the triangular and rectangular architectures for matrix multiplication. We recalibrate the system to account for passive phase deviations. Experimental programming of 3x3 and 4x4 random unitary matrices yields fidelities > 98% and bit precisions over 5 bits. To the best of our knowledge, this is the first time that random unitary matrices are demonstrated on a general-purpose photonic processor and pave the way for the implementation of programmable photonic circuits in optical computing and signal processing systems.
As quantum photonic hardware scales toward computationally relevant sizes, energy consumption has emerged as a key constraint. Programmable photonic integrated circuits, composed of interferometer meshes with tunable phase modulators, provide a flexible platform for quantum information processing using both qubits and qudits. In this work, we analyze the energetic cost of such devices by focusing on arbitrary quantum state preparation, a resource-intensive task central to quantum simulation and information processing. Using a common hardware, we benchmark qudit-based implementations, gate-based quantum computation, and measurement-based quantum computation. We find that while qudit encodings are attractive at small scale, their footprint and reconfiguration costs grow rapidly with system size, whereas qubit-based approaches incur significant overhead from entangling operations, feedforward, and reprogramming. Across all paradigms, scaling beyond a few tens of qubits renders either the energy consumption or the total preparation time prohibitive on fully programmable PICs. Our results highlight the need for optimized, task-specific photonic architectures to enable energy-efficient scaling.
The general-purpose programmable photonic processors offer a scalable and reconfigurable solution for a wide range of RF and optical applications. Therefore, implementing photonic Ising machines using programmable processors leverages the advantages of high speed and parallelism, enabling efficient hardware acceleration for finding ground-state solutions to combinatorial optimization problems. In this work, we demonstrate a novel programmable photonic Ising solver based on a hexagonal mesh general-purpose programmable photonic platform. The integrated system allows reconfigurable matrix multiplication and computes the Hamiltonian iteratively using an annealing algorithm that facilitates spin updates and effectively searches for the ground state. As a proof of concept, we experimentally solve two benchmark optimization problems, a fundamental three-node ferromagnetic coupling problem with external bias that demonstrates nontrivial spin interactions, and a four-node Max-Cut problem with arbitrary coupling matrices. Furthermore, to establish a large-scale capability, we emulated Ising problems with sizes up to N = 50, achieving success probabilities exceeding 80\%. Additionally, we examined the impact of errors, such as phase and coupling, on the performance of the programmable photonic Ising machine. Our general-purpose photonic Ising machine paves the way for implementing large-scale, programmable architectures for solving optimization problems.
Abstract Programmable photonic integrated circuits represent an emerging technology that amalgamates photonics and electronics, paving the way for light-based information processing at high speeds and low power consumption. Programmable photonics provides a flexible platform that can be reconfigured to perform multiple tasks, thereby holding great promise for revolutionizing future optical networks and quantum computing systems. Over the past decade, there has been constant progress in developing several different architectures for realizing programmable photonic circuits that allow for realizing arbitrary discrete unitary operations with light. Here, we systematically investigate a general family of photonic circuits for realizing arbitrary unitaries based on a simple architecture that interlaces a fixed intervening layer with programmable phase shifter layers. We introduce a criterion for the intervening operator that guarantees the universality of this architecture for representing arbitrary N×NN \times NN×N N × N unitary operators with N+1N+1N+1 N + 1 phase layers. We explore this criterion for different photonic components, including photonic waveguide lattices and meshes of directional couplers, which allows the identification of several families of photonic components that can serve as the intervening layers in the interlacing architecture. Our findings pave the way for efficiently designing and realizing novel families of programmable photonic integrated circuits for multipurpose analog information processing.